IC MOSFET DVR SYNC BUCK 10-DFN

ISL6594BCRZ-T

Manufacturer Part NumberISL6594BCRZ-T
DescriptionIC MOSFET DVR SYNC BUCK 10-DFN
ManufacturerIntersil
ISL6594BCRZ-T datasheet
 

Specifications of ISL6594BCRZ-T

ConfigurationHigh and Low Side, SynchronousInput TypePWM
Delay Time10.0nsCurrent - Peak1.25A
Number Of Configurations1Number Of Outputs2
High Side Voltage - Max (bootstrap)36VVoltage - Supply10.8 V ~ 13.2 V
Operating Temperature0°C ~ 85°CMounting TypeSurface Mount
Package / Case10-DFNLead Free Status / RoHS StatusLead free / RoHS Compliant
Other namesISL6594BCRZ-T  
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Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Noted. (Continued)
PARAMETER
LGATE Rise Time
UGATE Fall Time (Note 4)
LGATE Fall Time (Note 4)
UGATE Turn-On Propagation Delay (Note 4)
LGATE Turn-On Propagation Delay (Note 4)
UGATE Turn-Off Propagation Delay (Note 4)
LGATE Turn-Off Propagation Delay (Note 4)
LG/UG Three-State Propagation Delay (Note 4)
OUTPUT
Upper Drive Source Current (Note 4)
Upper Drive Source Impedance
Upper Drive Sink Current (Note 4)
Upper Drive Sink Impedance
Lower Drive Source Current (Note 4)
Lower Drive Source Impedance
Lower Drive Sink Current (Note 4)
Lower Drive Sink Impedance
NOTE:
4. Limits should be considered typical and are not production tested.
Functional Pin Description
PACKAGE PIN #
PIN
SOIC
DFN
SYMBOL
1
1
UGATE
Upper gate drive output. Connect to gate of high-side power N-Channel MOSFET.
2
2
BOOT
Floating bootstrap supply pin for the upper gate drive. Connect the bootstrap capacitor between this pin and the
PHASE pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See “Internal Bootstrap
Device” on page 7 for guidance in choosing the capacitor value.
-
3, 8
N/C
No Connection.
3
4
PWM
The PWM signal is the control input for the driver. The PWM signal can enter three distinct states during operation, see
“Three-State PWM Input” on page 6 for further details. Connect this pin to the PWM output of the controller.
4
5
GND
Bias and reference ground. All signals are referenced to this node. It is also the power ground return of the driver.
5
6
LGATE
Lower gate drive output. Connect to gate of the low-side power N-Channel MOSFET.
6
7
VCC
Connect this pin to a +12V bias supply. Place a high quality low ESR ceramic capacitor from this pin to GND.
7
9
PVCC
This pin supplies power to both upper and lower gate drives in ISL6594B; only the lower gate drive in ISL6594A.
Its operating range is +5V to 12V. Place a high quality low ESR ceramic capacitor from this pin to GND.
8
10
PHASE
Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET. This pin provides
a return path for the upper gate drive.
9
11
PAD
Connect this pad to the power ground plane (GND) via thermally enhanced connection.
5
ISL6594A, ISL6594B
SYMBOL
TEST CONDITIONS
t
V
= 12V, 3nF Load, 10% to 90%
RL
PVCC
t
V
= 12V, 3nF Load, 90% to 10%
FU
PVCC
t
V
= 12V, 3nF Load, 90% to 10%
FL
PVCC
t
V
= 12V, 3nF Load, Adaptive
PDHU
PVCC
t
V
= 12V, 3nF Load, Adaptive
PDHL
PVCC
t
V
= 12V, 3nF Load
PDLU
PVCC
t
V
= 12V, 3nF Load
PDLL
PVCC
t
V
= 12V, 3nF Load
PDTS
PVCC
I
V
= 12V, 3nF Load
U_SOURCE
PVCC
R
150mA Source Current
U_SOURCE
I
V
= 12V, 3nF Load
U_SINK
PVCC
R
150mA Sink Current
U_SINK
I
V
= 12V, 3nF Load
L_SOURCE
PVCC
R
150mA Source Current
L_SOURCE
I
V
= 12V, 3nF Load
L_SINK
PVCC
R
150mA Sink Current
L_SINK
FUNCTION
MIN
TYP
MAX
UNITS
-
18
-
ns
-
18
-
ns
-
12
-
ns
-
10
-
ns
-
10
-
ns
-
10
-
ns
-
10
-
ns
-
10
-
ns
-
1.25
-
A
Ω
1.4
2.0
3.0
-
2
-
A
Ω
0.9
1.65
3.0
-
2
-
A
Ω
0.85
1.3
2.2
-
3
-
A
Ω
0.60
0.94
1.35
FN9157.5
December 3, 2007