MC33887DHR2 Freescale Semiconductor, MC33887DHR2 Datasheet - Page 11

• Manufacturer Part Number: MC33887DHR2
• Description: IC H-BRIDGE 5A CURR FDBK 20-HSOP
• Manufacturer: Freescale Semiconductor

Specifications of MC33887DHR2

• Applications: DC Motor Controller, H Bridge
• Number Of Outputs: 1
• Current - Output: 5A
• Voltage - Supply: 5 V ~ 28 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-HSOP
• For Use With: KIT33887PNBEVB - KIT EVAL 33887 5A H-BRIDGE PQFNKIT33887DWBEVB - KIT EVAL 33887 5A H-BRIDGE SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Load: -

Analog Integrated Circuit Device Data
Freescale Semiconductor
Table 5. DYNAMIC ELECTRICAL CHARACTERISTICS
noted reflect the approximate parameter mean at T
TIMING CHARACTERISTICS
Notes
PWM Frequency
Maximum Switching Frequency During Active Current Limiting
Output ON Delay
Output OFF Delay
I
I
Output Rise and Fall Time
Disable Delay Time
Power-ON Delay Time
Wake-Up Delay Time
Output MOSFET Body Diode Reverse Recovery Time
24
25
26
27
28
29
30
31
32
33
LIM
LIM
Characteristics noted under conditions 5.0 V
V+ = 14 V
V+ = 14 V
V+ = 14 V, I
Output Constant-OFF Time for Low-Side MOSFETs
Blanking Time for Low-Side MOSFETs
The outputs can be PWM-controlled from an external source. This is typically done by holding one input high while applying a PWM
pulse train to the other input. The maximum PWM frequency obtainable is a compromise between switching losses and switching
frequency. See Typical Switching Waveforms,
The Maximum Switching Frequency during active current limiting is internally implemented. The internal current limit circuitry produces
a constant-OFF-time pulse-width modulation of the output current. The output load’s inductance, capacitance, and resistance
characteristics affect the total switching period (OFF-time + ON-time) and thus the PWM frequency during current limit.
Output Delay is the time duration from the midpoint of the IN1 or IN2 input signal to the 10% or 90% point (dependent on the transition
direction) of the OUT1 or OUT2 signal. If the output is transitioning HIGH-to-LOW, the delay is from the midpoint of the input signal to
the 90% point of the output response signal. If the output is transitioning LOW-to-HIGH, the delay is from the midpoint of the input signal
to the 10% point of the output response signal. See
I
the output bridge.
Load currents ramping up to the current regulation threshold become limited at the I
that ramps up to the I
shutdown circuitry to force the output into an immediate tri-state latch-OFF. See
mode may cause junction temperatures to rise. Junction temperatures above ~160
progressively “fold back”, or decrease with temperature, until ~175
Permissible operation within this fold-back region is limited to nonrepetitive transient events of duration not to exceed 30 seconds. See
Figure
I
comparators my have time to act.
Rise Time is from the 10% to the 90% level and Fall Time is from the 90% to the 10% level of the output signal. See
Disable Delay Time is the time duration from the midpoint of the D (disable) input signal to 10% of the output tri-state response. See
Figure
Parameter has been characterized but not production tested.
Parameter is guaranteed by design but not production tested.
LIM
LIM
Output Constant-OFF Time is the time during which the internal constant-OFF time PWM current regulation circuit has tri-stated
Blanking Time is the time during which the current regulation threshold is ignored so that the short-circuit detection threshold
9, page 12.
7, page 12.
OUT
(24)
(26)
(26)
= 3.0 A
(31)
(32)
(32)
(30)
SCH
Characteristic
or I
SCL
DYNAMIC ELECTRICAL CHARACTERISTICS
threshold during the I
(29)
,
(28)
≤
Figures 12
V+
(33)
A
(27)
≤
= 25°C under nominal conditions unless otherwise noted.
Figure
,
28 V and -40°C
LIM
(28)
(25)
through 19, pp. 14–17.
blanking time, registering as a short circuit event detection and causing the
6, page 12.
°
C is reached, after which the T
t
D (DISABLE)
≤
Symbol
t
t
T
D (OFF)
f
t
t
f
D (ON)
t
PWM
F
WUD
t
MAX
POD
A
R R
t
t
, t
A
B
≤
R
Figures 10
125°C unless otherwise noted. Typical values
°
LIM
C will cause the output current limit threshold to
value. The short circuit currents possess a di/dt
DYNAMIC ELECTRICAL CHARACTERISTICS
Min
100
and 11, page 13. Operation in Current Limit
2.0
15
12
–
–
–
–
–
–
–
ELECTRICAL CHARACTERISTICS
LIM
thermal latch-OFF will occur.
20.5
16.5
Typ
5.0
1.0
1.0
10
–
–
–
–
–
Figure
Max
8.0
8.0
5.0
5.0
20
18
18
26
21
–
–
8, page 12.
Unit
kHz
kHz
ms
ms
μs
μs
μs
μs
μs
μs
ns
33887
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