LP3971SQ-2G16/NOPB National Semiconductor, LP3971SQ-2G16/NOPB Datasheet - Page 21

IC PMU FOR APPL PROCESSORS 40LLP

LP3971SQ-2G16/NOPB

Manufacturer Part Number
LP3971SQ-2G16/NOPB
Description
IC PMU FOR APPL PROCESSORS 40LLP
Manufacturer
National Semiconductor
Series
PowerWise®r
Datasheet

Specifications of LP3971SQ-2G16/NOPB

Applications
Processor
Current - Supply
60µA
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-LLP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LP3971SQ-2G16
LP3971SQ-2G16
LP3971SQ-2G16TR
During PFM operation, the converter positions the output volt-
age slightly higher than the nominal output voltage during
PWM operation, allowing additional headroom for voltage
drop during a load transient from light to heavy load. The PFM
comparators sense the output voltage via the feedback pin
and control the switching of the output FETs such that the
output voltage ramps between <0.6% and <1.7% above the
nominal PWM output voltage. If the output voltage is below
FIGURE 2. Typical PFM Operation
FIGURE 3. Operation in PFM Mode and Transfer to PWM Mode
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the “high” PFM comparator threshold, the PMOS power
switch is turned on. It remains on until the output voltage
reaches the ‘high’ PFM threshold or the peak current exceeds
the IPFM level set for PFM mode. The typical peak current in
PFM mode is: IPFM = 112 mA + V
power switch is turned off, the NMOS power switch is turned
on until the inductor current ramps to zero. When the NMOS
zero-current condition is detected, the NMOS power switch is
turned off. If the output voltage is below the ‘high’ PFM com-
parator threshold (see Figure 3), the PMOS switch is again
turned on and the cycle is repeated until the output reaches
the desired level. Once the output reaches the ‘high’ PFM
threshold, the NMOS switch is turned on briefly to ramp the
inductor current to zero and then both output switches are
turned off and the part enters an extremely low power mode.
Quiescent supply current during this ‘sleep’ mode is 21 μA
(typ), which allows the part to achieve high efficiencies under
extremely light load conditions. When the output drops below
the ‘low’ PFM threshold, the cycle repeats to restore the out-
put voltage (average voltage in PFM mode) to <1.15% above
the nominal PWM output voltage. If the load current should
increase during PFM mode (see Figure 3) causing the output
voltage to fall below the ‘low2’ PFM threshold, the part will
automatically transition into fixed-frequency PWM mode. Typ-
ically when V
mode at 100 mA output current .
IN
= 3.6V the part transitions from PWM to PFM
IN
/27Ω. Once the PMOS
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