ISL6559CRZ-TR5265 Intersil, ISL6559CRZ-TR5265 Datasheet - Page 15

IC PWM CTRLR 2-4PHASE 32-QFN

ISL6559CRZ-TR5265

Manufacturer Part Number
ISL6559CRZ-TR5265
Description
IC PWM CTRLR 2-4PHASE 32-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6559CRZ-TR5265

Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
4MHz
Duty Cycle
75%
Voltage - Supply
4.75 V ~ 5.25 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 70°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Frequency-max
4MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
loop. Select the values for these resistors based on the room
temperature r
operating current, I
according to Equation 19 (see also Figure 3).
In certain circumstances, it may be necessary to adjust the
value of one or more of the ISEN resistors. This can arise
when the components of one or more channels are inhibited
from dissipating their heat so that the affected channels run
hotter than desired (see the section entitled Channel-Current
Balance). In these cases, chose new, smaller values of R
for the affected phases. Choose R
desired decrease in temperature rise in order to cause
proportionally less current to flow in the hotter phase.
In Equation 20, make sure that ∆T
rise above the ambient temperature, and ∆T
temperature rise above the ambient temperature. While a
single adjustment according to Equation 20 is usually
sufficient, it may occasionally be necessary to adjust R
two or more times to achieve perfect thermal balance between
all channels.
Load-Line Regulation Resistor
The load-line regulation resistor is labeled R
Its value depends on the desired full-load droop voltage
(V
ISEN resistor, the load-line regulation resistor is as shown
in Equation 21.
If one or more of the ISEN resistors was adjusted for thermal
balance, as in Equation 20, the load-line regulation resistor
should be selected according to Equation 22. Where I
the full-load operating current and R
resistor connected to the n
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation, there are two distinct
methods for achieving these goals.
R
R
R
R
ISEN
ISEN 2 ,
FB
FB
DROOP
=
=
=
V
------------------------ -
--------------------------------
I
50 10
FL
V
=
DROOP
---------------------- -
50 10
r
DROOP
DS ON
in Figure 5). If Equation 19 is used to select each
×
r
R
DS ON
×
ISEN
(
DS(ON)
(
6
6
)
∆T
----------
∆T
)
I
------- -
FL
FL
N
n
2
1
of the lower MOSFETs; the full-load
; and the number of phases, N
R
ISEN n ( )
th
15
ISEN pin.
2
ISEN,2
is the desired temperature
ISEN(n)
in proportion to the
1
is the ISEN
is the measured
FB
in Figure 5.
(EQ. 19)
(EQ. 20)
(EQ. 21)
(EQ. 22)
ISEN
FL
ISEN
is
ISL6559
COMPENSATING LOAD-LINE REGULATED
CONVERTER
The load-line regulated converter behaves in a similar
manner to a peak-current mode controller because the two
poles at the output-filter L-C resonant frequency split with
the introduction of current information into the control loop.
The final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R
Since the system poles and zero are effected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator by compensating the L-C
poles and the ESR zero of the voltage-mode approximation
yields a solution that is always stable with very close to ideal
transient performance.
The feedback resistor, R
outlined in Load-Line Regulation Resistor. Select a target
bandwidth for the compensated system, f
bandwidth must be large enough to assure adequate
transient performance, but smaller than 1/3 of the per-
channel switching frequency. The values of the
compensation components depend on the relationships of f
to the L-C pole frequency and the ESR zero frequency. For
FIGURE 12. COMPENSATION CONFIGURATION FOR
R
FB
LOAD-LINE REGULATED ISL6559 CIRCUIT
+
-
R
V
C
DROOP
C
2
(OPTIONAL)
C
FB
C
, has already been chosen as
C
and C
COMP
VDIFF
C
IOUT
.
FB
0
. The target
December 29, 2004
FN9084.8
0

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