ISL6306CRZ-T Intersil, ISL6306CRZ-T Datasheet - Page 28

• Manufacturer Part Number: ISL6306CRZ-T
• Description: IC CTRLR PWM 4-PHASE 40-QFN
• Manufacturer: Intersil

Specifications of ISL6306CRZ-T

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 275kHz
• Duty Cycle: 66.7%
• Voltage - Supply: 4.75 V ~ 5.25 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-VFQFN, 40-VFQFPN
• Frequency-max: 275kHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

from Equations 25, 26, and 27. Since the power equations
depend on MOSFET parameters, choosing the correct
MOSFETs can be an iterative process involving repetitive
solutions to the loss equations for different MOSFETs and
different switching frequencies.
Current Sensing Resistor
The resistors connected between these pins and the
respective phase nodes determine the gains in the load-line
regulation loop and the channel-current balance loop as well
as setting the overcurrent trip point. Select values for these
resistors based on the room temperature r
lower MOSFETs, DCR of inductor or additional resistor; the
full-load operating current, I
using Equation 29.
In certain circumstances, it may be necessary to adjust the
value of one or more ISEN resistor. When the components of
one or more channels are inhibited from effectively
dissipating their heat so that the affected channels run hotter
than desired, choose new, smaller values of R
affected phases (see the section entitled “Channel-Current
Balance” on page 15). Choose R
desired decrease in temperature rise in order to cause
proportionally less current to flow in the hotter phase.
In Equation 30, make sure that ΔT
rise above the ambient temperature, and ΔT
temperature rise above the ambient temperature. While a
single adjustment according to Equation 30 is usually
sufficient, it may occasionally be necessary to adjust R
two or more times to achieve optimal thermal balance
between all channels.
Load-Line Regulation Resistor
The load-line regulation resistor is labelled R
Its value depends on the desired full load droop voltage
(V
ISEN resistor, the load-line regulation resistor is as shown in
Equation 31.
If one or more of the ISEN resistors is adjusted for thermal
balance, as in Equation 30, the load-line regulation resistor
should be selected according to Equation 32 where I
full-load operating current and R
connected to the n
P
R
R
R
UP 4 ,
ISEN
ISEN 2 ,
FB
DROOP
=
≈
=
V
------------------------ -
r
70 10
DS ON
=
DROOP
---------------------- -
70 10
×
in Figure 8). If Equation 29 is used to select each
(
R
R
×
ISEN
X
–
6
)
–
⎛
⎜
⎝
6
I
----- -
N
ΔT
----------
ΔT
M
I
------- -
th
FL
N
⎞
⎟
⎠
2
1
2
ISEN pin.
d
+
I
---------- - d
P-P
12
FL
2
28
; and the number of phases, N
ISEN(n)
ISEN2
2
is the desired temperature
in proportion to the
is the ISEN resistor
DS(ON)
1
is the measured
FB
ISEN
in Figure 8.
of the
for the
FL
(EQ. 28)
(EQ. 29)
(EQ. 30)
(EQ. 31)
ISEN
is the
ISL6306
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation, there are two distinct
methods for achieving these goals.
COMPENSATING LOAD-LINE REGULATED
CONVERTER
The load-line regulated converter behaves in a similar
manner to a peak-current mode controller because the two
poles at the output-filter LC resonant frequency split with the
introduction of current information into the control loop. The
final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator by compensating the LC
poles and the ESR zero of the voltage-mode approximation
yields a solution that is always stable with very close to ideal
transient performance.
The feedback resistor, R
outlined in “Load-Line Regulation Resistor” on page 28.
Select a target bandwidth for the compensated system, f
The target bandwidth must be large enough to assure
adequate transient performance, but smaller than 1/3 of the
per-channel switching frequency. The values of the
compensation components depend on the relationships of f
to the LC pole frequency and the ESR zero frequency. For
each of the three cases which follow, there is a separate set
of equations for the compensation components.
R
FIGURE 19. COMPENSATION CONFIGURATION FOR
FB
=
--------------------------------
I
FL
V
DROOP
r
DS ON
R
FB
LOAD-LINE REGULATED ISL6306 CIRCUIT
(
)
V
+
-
∑
DROOP
n
R
C
R
ISEN n ( )
C
FB
2
C
(OPTIONAL)
, has already been chosen as
C
C
and C
IDROOP
COMP
VDIFF
FB
C
.
May 5, 2008
(EQ. 32)
FN9226.1
0
.
0