ISL6306CRZ-T Intersil, ISL6306CRZ-T Datasheet - Page 29

• Manufacturer Part Number: ISL6306CRZ-T
• Description: IC CTRLR PWM 4-PHASE 40-QFN
• Manufacturer: Intersil

Specifications of ISL6306CRZ-T

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 275kHz
• Duty Cycle: 66.7%
• Voltage - Supply: 4.75 V ~ 5.25 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-VFQFN, 40-VFQFPN
• Frequency-max: 275kHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

In Equation 33, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all
output capacitors; ESR is the equivalent-series resistance of
the bulk output-filter capacitance; and V
peak sawtooth signal amplitude as described in Figure 7 and
“Electrical Specifications” on page 8.
The optional capacitor C
noise away from the PWM comparator (see Figure 20). Keep
a position available for C
frequency capacitor of between 22pF and 150pF in case any
leading-edge jitter problem is noted.
Once selected, the compensation values in Equation 33
assure a stable converter with reasonable transient
performance. In most cases, transient performance can be
improved by making adjustments to R
value of R
oscilloscope until no further improvement is noted. Normally,
C
Equation 33 unless some performance issue is noted.
COMPENSATION WITHOUT LOAD-LINE REGULATION
The non load-line regulated converter is accurately modeled
as a voltage-mode regulator with two poles at the LC
resonant frequency and a zero at the ESR frequency. A
type III controller, as shown in Figure 20, provides the
necessary compensation.
Case 1:
Case 2:
Case 3:
C
will not need adjustment. Keep the value of C
C
while observing the transient performance on an
-------------------
2π LC
R
C
-------------------
2π LC
R
C
f
R
C
0
C
C
C
C
C
C
>
1
1
=
=
=
=
----------------------------- -
2πC ESR
=
=
R
R
-------------------------------------------------------------- -
(
------------------------------------- -
2πV
R
0.75V
------------------------------------------------ -
2
2π
2πV
2
≤
>
FB
FB
FB
, is sometimes needed to bypass
, and be prepared to install a high-
(
1
0.75V
f
f
0
)
0
P-P
V
--------------------------------------------- -
2πf
-------------------------------------- -
2
<
----------------------------------------- -
0.75 V
P-P
29
P-P
f
IN
0
----------------------------- -
2πC ESR
2π f
0.75V
0.75V
2
0
R
)
(
0.75 V
R
IN
V
V
(
FB
ESR
2π
FB
P-P
P-P
0
IN
(
1
f
V
0
)
f
IN
IN
2
P-P
0
R
(
) C
IN
ESR
C
f
LC
FB
0
L
. Slowly increase the
2
PP
L
)
LC
LC
)
is the peak-to-
C
from
(EQ. 33)
ISL6306
The first step is to choose the desired bandwidth, f
compensated system. Choose a frequency high enough to
assure adequate transient performance but not higher than
1/3 of the switching frequency. The type-III compensator has
an extra high-frequency pole, f
added noise rejection or to assure adequate attenuation at
the error-amplifier high-order pole and zero frequencies. A
good general rule is to choose f
higher if desired. Choosing f
cause problems with too much phase shift below the system
bandwidth.
In the solutions to the compensation equations, there is a
single degree of freedom. For the solutions presented in
Equation 34, R
compensation components are then selected according to
Equation 34.
In Equation 34, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all
output capacitors; ESR is the equivalent-series resistance of
the bulk output-filter capacitance; and V
peak sawtooth signal amplitude as described in Figure 7 and
“Electrical Specifications” on page 8.
R
C
C
R
C
FIGURE 20. COMPENSATION CIRCUIT FOR ISL6306 BASED
1
1
2
C
C
=
=
=
=
=
C
R
R
---------------------------------------- -
-------------------------------------------------------------------- -
(
-------------------------------------------------------------------- -
0.75 V
-------------------------------------------------------------------- -
(
2π
V
1
2π
1
0.75V
LC C ESR
FB
P-P
)
)
2
---------------------------------------- -
2
–
R
f
f
LC C ESR
⎛
⎝
0
IN
0
FB
2π
IN
f
C ESR
f
CONVERTER WITHOUT LOAD-LINE
REGULATION
HF
(
0.75V
HF
⎞
⎠
⎛
⎝
FB
(
–
⎛
⎝
2πf
2πf
2
f
LCR
0
LCR
is selected arbitrarily. The remaining
(
HF
R
HF
f
)
IN
HF
FB
R
)
C
FB
LCR
LC 1
FB
LC 1
)
C
V
2
V
–
–
C
P-P
P-P
FB
C
⎞
⎠
⎞
⎠
HF
HF
to be lower than 10f
HF
IDROOP
. This pole can be used for
COMP
VDIFF
= 10f
FB
P-P
0
, but it can be
is the peak-to-
0
0
, of the
May 5, 2008
(EQ. 34)
can
FN9226.1