ISL6521CBZ-T Intersil, ISL6521CBZ-T Datasheet - Page 7

IC CTRLR PWM BUCK DC/DC 16-SOIC

ISL6521CBZ-T

Manufacturer Part Number
ISL6521CBZ-T
Description
IC CTRLR PWM BUCK DC/DC 16-SOIC
Manufacturer
Intersil
Datasheet

Specifications of ISL6521CBZ-T

Pwm Type
Voltage Mode
Number Of Outputs
4
Frequency - Max
325kHz
Duty Cycle
100%
Voltage - Supply
4.5 V ~ 5.5 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 70°C
Package / Case
16-SOIC (3.9mm Width)
Frequency-max
325kHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The OC trip point varies with MOSFET’s r
temperature variations. To avoid overcurrent tripping in the
normal operating load range, determine the R
resistor from the equation above with:
For an equation for the ripple current see the section under
component guidelines titled ‘Output Inductor Selection’.
Output Voltage Selection
The output voltage of the PWM converter can be resistor-
programmed to any level between V
since the value of R
the compensation components, it is advisable its value is
kept between 2kΩ and 5kΩ.
2. The minimum I
3. Determine I
1. The maximum r
V
V
FIGURE 4. ADJUSTING THE OUTPUT VOLTAGE OF ANY OF
i
OC
+5V
OUT3
OUT4
V
D
∆I is the output inductor ripple current.
OUT
¥
OVERCURRENT TRIP:
C
IN
C
PWM
r
OCC
OUT4
OUT3
DS ON
=
(
V
FIGURE 3. OVERCURRENT DETECTION
0.8
+
+
DS
-
+
THE FOUR REGULATORS (OUTPUTS 3 AND 4
PICTURED)
)
×
>
>
PEAK
V
CONTROL
I
1
OCSET
SET
Q3
+
GATE
OCSET
DS(ON)
R
------- -
R
S1
S
P
for I
DRIVE
I
is affecting the values of the rest of
OCSET
40µA
¥
OCSET
PEAK
R
R
R
at the highest junction temperature.
from the specification table.
OCSET
S4
S3
7
> I
VCC
R
OUT(MAX)
UGATE
R
DRIVE3
P3
DRIVE4
P4
IN
PHASE
R
V
V
FB3
FB4
OCSET
V
PHASE
OCSET
and 0.8V . However,
SET
DS(ON)
+
+ (∆I) / 2, where
=
=
ISL6521
OCSET
V
V
IN
i
V
D
V
IN
IN
+
= +5V
DS(ON)
V
V
DS
SET
ISL6521
Output voltage selection on the linear regulators is set by
means of external resistor dividers as shown in Figure 4.
The two resistors used to set the voltage on each of the
three linear regulators have to meet the following criteria:
their value while in a parallel connection has to be less than
5kΩ, or otherwise said, the following relationship has to be
met:
To ensure the parallel combination of the feedback resistors
equals a certain chosen value, R
equations:
V
V
Application Guidelines
Soft-Start Interval
The soft-start function controls the output voltages rate of rise
to limit the current surge at start-up. The soft-start function is
integrated on the chip and the soft-start interval is fixed.
PWM Controller Feedback Compensation
The PWM controller uses voltage-mode control for output
regulation. This section highlights the design consideration
for a PWM voltage-mode controller. Apply the methods and
considerations only to the PWM controller.
Figure 5 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(V
error amplifier (Error Amp) output (V
the oscillator (OSC) triangular wave to provide a pulse-width
modulated (PWM) wave with an amplitude of V
PHASE node. The PWM wave is smoothed by the output
filter (L
The modulator transfer function is the small-signal transfer
function of V
Gain, given by V
with a double pole break frequency at F
F
Modulator Break Frequency Equations
The compensation network consists of the error amplifier
(internal to the ISL6521) and the impedance networks Z
F
R
--------------------- -
R
R
R
ESR
OUT
FB
LC
S
S
S
P
OUT
×
+
=
=
=
- feedback (reference) voltage, 0.8V.
R
R
.
V
--------------- -
-------------------------------- -
V
--------------------------------------- -
- the desired output voltage,
) is regulated to the reference voltage level, 0.8V. The
P
P
V
O
R
OUT
OUT
<
FB
S
and C
×
5kΩ
×
×
L
V
1
OUT
O
V
R
FB
FB
O
×
FB
IN
).
/V
C
, where
O
/V
E/A
OSC
. This function is dominated by a DC
, and shaped by the output filter,
F
ESR
=
FB
---------------------------------------- -
, use the following
×
E/A
ESR
) is compared with
LC
1
×
and a zero at
C
O
IN
at the
IN

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