ISL6326BIRZ Intersil, ISL6326BIRZ Datasheet
ISL6326BIRZ
Specifications of ISL6326BIRZ
Related parts for ISL6326BIRZ
ISL6326BIRZ Summary of contents
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... PART (Note) MARKING ISL6326BCRZ ISL6326BCRZ ISL6326BIRZ ISL6326BIRZ - 6x6 QFN L40.6x6 Add “-T” suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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Pinout VID6 VID5 VID4 VID3 VID2 VID1 VID0 VRSEL OFS DAC 2 ISL6326B ISL6326B (40 LD QFN) TOP VIEW GND ...
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ISL6326BCR Block Diagram VDIFF - RGND X1 + VSEN SOFTSTART + OVP AND - FAULT LOGIC +175m V SS VRSEL VID7 VID6 VID5 Dynam ic VID4 VID VID3 D/A VID2 VID1 VID0 DAC OFS OFFSET REF FB COMP 2.0V - ...
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Typical Application - 4-Phase Buck Converter with Integrated Thermal Compensation +5V COMP VCC FB VDIFF VSEN PWM1 RGND ISEN1- EN_VTT VTT ISEN1+ VR_RDY VID7 ISL6326B VID6 VID5 VID4 PWM2 VID3 VID2 ISEN2- VID1 ISEN2+ VID0 VRSEL PWM3 VR_FAN ISEN3- VR_HOT ...
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Typical Application - 4-Phase Buck Converter with External Thermal Compensation NTC + COMP VCC FB VDIFF VSEN RGND ISEN1+ EN_VTT VTT ISEN1- VR_RDY PWM1 VID7 VID6 ISL6326B VID5 VID4 VID3 PWM3 VID2 ISEN3- VID1 ISEN3+ VID0 VRSEL ISEN2+ ...
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... Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5% Ambient Temperature (ISL6326BCRZ 0°C to 70°C Ambient Temperature (ISL6326BIRZ .-40°C to 85°C CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. ...
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Electrical Specifications Operating Conditions: VCC = 5V, Unless Otherwise Specified (Continued) PARAMETER DAC Sink Current REF Source Current REF Sink Current PIN-ADJUSTABLE OFFSET Voltage at OFS Pin OSCILLATORS Accuracy of Switching Frequency Setting Adjustment Range of Switching Frequency (Note 4) ...
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Electrical Specifications Operating Conditions: VCC = 5V, Unless Otherwise Specified (Continued) PARAMETER Leakage Current of VR_HOT VR_HOT Low Voltage VR READY AND PROTECTION MONITORS Leakage Current of VR_RDY VR_RDY Low Voltage Undervoltage Threshold VR_RDY Reset Voltage Overvoltage Protection Threshold Overvoltage ...
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... PWM1, PWM2, PWM3, PWM4 - Pulse width modulation outputs. Connect these pins to the PWM input pins of the Intersil driver IC. The number of active channels is determined by the state of PWM3 and PWM4. Tie PWM3 to VCC to configure for 2-phase operation. Tie PWM4 to VCC to configure for 3-phase operation. ...
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OFS - The OFS pin can be used to program a DC offset current which will generate a DC offset voltage between the REF and DAC pins. The offset current is generated via an external resistor and precision internal voltage ...
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... Figure 20 shows the single phase input-capacitor RMS current for comparison. PWM Modulation Scheme The ISL6326B adopts Intersil's proprietary Active Pulse Positioning (APP) modulation scheme to improve transient performance. APP control is a unique dual-edge PWM modulation scheme with both PWM leading and trailing edges being independently moved to give the best response to transient loads ...
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Equation 3 is provided to assist in selecting the correct resistor value. 10 2.5X10 R = ------------------------- - where F is the switching frequency of each phase. SW Current Sensing ISL6326B senses the ...
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... Channel current balance is achieved by comparing the sensed current of each channel to the average current to make an appropriate adjustment to the PWM duty cycle of each channel with Intersil’s patented current-balance method. Channel current balance is essential in achieving the thermal advantage of multiphase operation. With good current balance, the power loss is equally dissipated over multiple devices and a greater area ...
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TABLE 1. VR10 VID TABLE (WITH 6.25mV EXTENSION) VID4 VID3 VID2 VID1 VID0 VID5 400mV 200mV 100mV 50mV 25mV 12.5mV ...
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TABLE 1. VR10 VID TABLE (WITH 6.25mV EXTENSION) (Continued) VID4 VID3 VID2 VID1 VID0 VID5 400mV 200mV 100mV 50mV 25mV 12.5mV ...
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TABLE 2. VR11 VID 8 BIT (Continued) VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE ...
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TABLE 2. VR11 VID 8 BIT (Continued) VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE ...
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Load-Line Regulation Some microprocessor manufacturers require a precisely- controlled output resistance. This dependence of output voltage on load current is often termed “droop” or “load line” regulation. By adding a well controlled output impedance, the output voltage can effectively be ...
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... ICs reach their POR level before the ISL6326B becomes enabled. The schematic in Figure 7 demonstrates sequencing the ISL6326B with the 19 ISL6326B ISL66xx family of Intersil MOSFET drivers, which require 12V bias. 3. The voltage on EN_VTT must be higher than 0.875V to enable the controller. This pin is typically connected to the output of VTT VR. ...
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... At the inception of an overvoltage event, all PWM outputs (EQ. 17) are commanded low instantly (less than 20ns). This causes the Intersil drivers to turn on the lower MOSFETs and pull is the the output voltage below a level to avoid damaging the load. IOUT ...
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... ISL6326B At the beginning of overcurrent shutdown, the controller places all PWM signals in a high-impedance state within 20ns, commanding the Intersil MOSFET driver ICs to turn off both upper and lower MOSFETs. The system remains in this state a period of 4096 switching cycles. If the controller is still enabled at the end of this wait period, it will attempt a soft- start ...
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The diagram of thermal monitoring function block is shown in Figure 11. One NTC resistor should be placed close to the power stage of the voltage regulator to sense the operational temperature, and one pull-up resistor is needed to form ...
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Temperature Compensation ISL6326B supports inductor DCR sensing, or resistive sensing techniques. The inductor DCR has a positive temperature coefficient, which is about +0.38%/°C. Since the voltage across inductor is sensed for the output current information, the sensed current has the ...
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... It is assumed that the reader is familiar with many of the basic skills and techniques referenced below. In addition to this guide, Intersil provides complete reference designs that include schematics, bills of materials, and example board layouts for all common microprocessor applications ...
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Upper MOSFET losses can be divided into separate components involving the upper-MOSFET switching times; the lower-MOSFET body-diode reverse- recovery charge and ...
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Based on the desired loadline R , the loadline regulation LL resistor can be calculated by the following equation ISEN R = --------------------------------- - where N is the active channel number, R resistor ...
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V amplitude described in Electrical Specifications. The optional capacitor sometimes needed to bypass 2 noise away from the PWM comparator. Keep a position available for C , and be prepared to install ...
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Output Filter Design. Choose the lowest switching frequency that allows the regulator to meet the transient-response requirements. Input Capacitor Selection The input capacitors are responsible for sourcing the AC component of the input current flowing ...
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... Align the output inductors and MOSFETs such that space between the components is minimized while creating the PHASE plane. Place the Intersil MOSFET driver IC as close as possible to the MOSFETs they control to reduce the parasitic impedances due to trace length between critical driver input and output signals ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...