ISL6227CAZ Intersil, ISL6227CAZ Datasheet - Page 19

• Manufacturer Part Number: ISL6227CAZ
• Description: IC CONTROLLER DDR, DDR2 28QSOP
• Manufacturer: Intersil
• Type: Pulse Width Modulator Controllerr

Specifications of ISL6227CAZ

• Applications: Controller, DDR, DDR2
• Voltage - Input: 5 ~ 28 V
• Number Of Outputs: 2
• Voltage - Output: 0.9 ~ 5.5 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 28-QSOP
• Current, Output: 10 mA
• Current, Supply: 1.8 mA
• Frequency, Oscillator: 300 kHz
• Package Type: QSOP-28
• Regulator Type: DC-DC
• Voltage, Input: 5 V
• Voltage, Output: 5.5 V
• Voltage, Supply: 5 V
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Voltage Monitor and Protections
The converter output is monitored and protected against
extreme overload, short circuit, overvoltage, and
undervoltage conditions. A sustained overload on the output
sets the PGOOD low and latches off the offending channel of
the chip. The controller operation can be restored by cycling
the VCC voltage or toggling both enable (EN) pins to low to
clear the latch.
Power Good
In the soft-start process, the PGOOD is established after the
soft pin voltage is at 1.5V. In normal operation, the PGOOD
window is 100mV below the 0.9V and 135mV higher than
0.9V. The VSEN pin has to stay within this window for
PGOOD to be high. Since the VSEN pin is used for both
feedback and monitoring purposes, the output voltage
deviation can be coupled directly to the VSEN pin by the
capacitor in parallel with the voltage divider as shown in
Figure 4. In order to prevent false PGOOD drop, capacitors
need to parallel at the output to confine the voltage deviation
with severe load step transient. The PGOOD comparator
has a built-in 3µs filter. PGOOD is an open drain output.
Overcurrent Protection
In dual switcher application, both PWM controllers use the
lower MOSFETs on-resistance r
current for protection against shorted outputs. The sensed
current from the ISEN pin is compared with a current set by
a resistor connected from the OCSET pin to ground:
where, I
R
the ISEN pin. The 8µA is the offset current added on top of
the sensed current from the ISEN pin for internal circuit
biasing.
If the lower MOSFET current exceeds the overcurrent
threshold, a pulse skipping circuit is activated. The upper
MOSFET will not be turned on and the lower MOSFET
keeps conducting as long as the sampled current is higher
than the threshold value, limiting the current supplied by the
DC voltage source. The current in the lower MOSFET will be
sampled at the internal 300kHz oscillator frequency and
monitored. When the sampled current is lower than the OC
threshold value, the following UGATE pulse will be released
and it allows turning on the upper MOSFET based on the
voltage regulation loop. This kind of operation remains for
eight clock cycles after the overcurrent comparator was
tripped for the first time. If after the first eight clock cycles the
sampled current exceeds the overcurrent threshold again,
within a time interval of another eight clock cycles, the
overcurrent protection latches and disables the offending
channel. If the overcurrent condition goes away during the
R
CS
SET
is the value of the current sense resistor connected to
=
OC
-------------------------------------------------------- -
I
--------------------------------------
OC
R
CS
is a desired overcurrent protection threshold and
•
r
+
DS ON
10.3V
140Ω
(
)
+
8μA
19
DS(ON),
to monitor the
(EQ. 15)
ISL6227
first eight clock cycles, normal operation is restored and the
overcurrent circuit resets itself at the end of sixteenth clock
cycles; see Figure 40.
Due to the nature of the used current sensing technique,
and to accommodate a wide range of the r
the value of the overcurrent threshold should set at about
180% of the nominal load value. If more accurate current
protection is desired, a current sense resistor placed in
series with the lower MOSFET source may be used. The
inductor current going through the lower MOSFET is sensed
and held at 400ns after the upper MOSFET is turned off;
therefore, the sensed current is very close to its peak value.
The inductor peak current can be written as Equation 16:
As seen from Equation 16, the inductor peak current
changes with the input voltage and the inductor value once
an output voltage is selected.
After overcurrent protection is activated, there are two ways
to bring the offending channel back: (1) Both EN1 and EN2
have to be held low to clear the latch, (2) To recycle the VCC
of the chip, the POR will clear the latch.
Undervoltage Protection
In the process of operation, if a short circuit occurs, the output
voltage will drop quickly. Before the overcurrent protection
circuit responds, the output voltage will fall out of the required
regulation range. The chip comes with undervoltage protection.
If a load step is strong enough to pull the output voltage lower
than the undervoltage threshold, the offending channel latches
off immediately. The undervoltage threshold is 75% of the
nominal output voltage. Toggling both pins to low, or recycling
VCC, will clear the latch and bring the chip back to operation.
Overvoltage Protection
Should the output voltage increase over 115% of the normal
value due to the upper MOSFET failure, or for other reasons,
the overvoltage protection comparator will force the
synchronous rectifier gate driver high. This action actively
pulls down the output voltage and eventually attempts to
blow the battery fuse. As soon as the output voltage is within
I
peak
=
3
1
2
FIGURE 40. OVERCURRENT PROTECTION
------------------------------------------- -
2L
(
V
Ch3 1.0AΩ
Ch1 5.0V
o
IN
IL
•
–
F
SW
V
o
) V
•
•
PGOOD
V
VOUT
IN
o
Ch2 100mV
+
I
load
8 CLK
SHUTDOWN
DS(ON)
M 10.0μs
variation,
May 4, 2009
(EQ. 16)
FN9094.7