ISL6217ACVZ Intersil, ISL6217ACVZ Datasheet - Page 11

• Manufacturer Part Number: ISL6217ACVZ
• Description: IC CTRLR PWM INTEL PENT 38-TSSOP
• Manufacturer: Intersil

Specifications of ISL6217ACVZ

• Applications: Controller, Intel Pentium® IMVP-IV, IMVP+
• Voltage - Input: 5.5 ~ 25 V
• Number Of Outputs: 1
• Operating Temperature: -10°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 38-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -

Active, Deep Sleep and Deeper Sleep Modes
The ISL6217A Multi-Phase Controller is designed to control
the CORE output voltage as per the IMVP-IV™ and
IMVP-IV+™ specifications for Active, Deep Sleep, and
Deeper Sleep Modes of Operation.
After initial Start-up, a logic high signal on DSEN# and a
logic low signal on DRSEN signals the ISL6217A to operate
in Active mode. Refer to Table 2. This mode will recognize
VID code changes and regulate the output voltage to these
command voltages.
FIGURE 5. PLOT SHOWING TIMING OF VID CODE CHANGES AND CORE VOLTAGE SLEWING AS WELL AS PGOOD MASKING
VID[0..5]
V
PGOOD
STP_CPU#
(DSEN#)
V
VID[0..5]
STP_CPU#
(DSEN#)
DPRSLPVR
(DRSEN)
VID[0..5]
V
CC_CORE
CC_CORE
CC_CORE
11
FIGURE 6. VCORE RESPONSE FOR DEEPER SLEEP COMMAND
FIGURE 7. VCORE RESPONSE FOR DEEPER SLEEP COMMAND
HIGH
V
Deep Sleep
Current Voltage Level
Current VID Code
V
Deeper Sleep
VID Command Voltage
<600ns
V
Deep Sleep
Deeper Sleep Mode
ISL6217A
VID Code remains the same
VID Code remains the same
Short DPRSLP causes
V
CC-CORE
New VID Code
to ramp up
TABLE 2. OUTPUT VOLTAGE AS A FUNCTION OF DSEN#
New Voltage Level
STP_CPU#
DSEN# -
1
0
0
1
AND DRSEN LOGIC STATES
<30us
DPRSLPVR
DRSEN -
0
0
1
1
Deeper Sleep
Deeper Sleep
OPERATION
Deep Sleep
MODE OF
Active
VOLTAGE
June 30, 2005
OUTPUT
DRSV
DRSV
DSV
VID
FN9107.3