ISL6217CVZ-T Intersil, ISL6217CVZ-T Datasheet - Page 12

• Manufacturer Part Number: ISL6217CVZ-T
• Description: IC CTRLR PWM INTEL PENT 38-TSSOP
• Manufacturer: Intersil

Specifications of ISL6217CVZ-T

• Applications: Controller, Intel Pentium® IMVP-IV, IMVP+
• Voltage - Input: 5.5 ~ 25 V
• Number Of Outputs: 1
• Operating Temperature: -10°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 38-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -

When DSEN# is logic low and DRSEN is logic high the
controller will operate in Deeper Sleep mode. The ISL6217
will then regulate to the voltage at the DRSV pin minus
“Droop”. If the PWRCH pin is connected to the DSEN# pin,
then the controller will also automatically switch to single
channel operation.
If the PWRCH pin is connected to an inverted DPRSLPVR
system signal, then the controller will automatically switch
to single channel operation during Deeper Sleep mode
only. Deep and Deeper Sleep voltage levels are
programmable and explained in the “STV, DSV and DRSV”
section of this document.
STV, DSV and DRSV
Start-up “Boot” Voltage - STV
The start-up or “Boot” voltage is programmed by an
external resistor divider network from the OCSET pin
(Refer to Figure 8). Internally, a 1.75V reference voltage is
output on the OCSET pin. The start-up voltage is set
through a voltage divider from the 1.75V reference at the
OCSET pin. The voltage on the STV pin will be the voltage
the controller will regulate to during the start-up sequence.
Once the PGOOD pin of the ISL6217 controller is
externally enabled high by the Vccp and Vcc_mch
controllers, the ISL6217 will then ramp, after a 10ms delay,
to the voltage commanded by the VID setting minus
“Droop”.
FIGURE 8.
Deep Sleep Voltage - DSV
The Deep Sleep voltage is programmed by an external
voltage divider network from the DACOUT pin (Refer to
Figure 8). The DACOUT pin is the output of the VID digital-
to-analog converter. By having the Deep Sleep voltage
setup from a resistor divider from DAC, the Deep Sleep
voltage will be a constant percentage of the VID. Through
the voltage divider network, Deep Sleep voltage is set to
98.8% of the programmed VID voltage, as per the IMVP-
IV™ and IMVP-IV+™ specification.
The IC enters the Deep Sleep mode when the DSEN# is
V
REF
R
R
R
1
2
3
= 1.75V
I
OCSET
36.5K
30.1K
49.9K
CONFIGURATIONS FOR BATTERY INPUT,
OVERCURRENT SETTING AND START, DEEP
SLEEP AND DEEPER SLEEP VOLTAGE
DIVIDERS
1.200V
0.750V
0.012 μ F
OCSET
STV
DRSV
SOFT
ISL6217
GND
12
DACOUT
VBAT
DSV
VID COMMAND
VOLTAGE
BATTERY
1.21K
98.8K
98.8%
DACOUT
ISL6217
low and the DRSEN pin is low as shown in Figure 6 and
Figure 7. Once in Deep Sleep Mode, the controller will
regulate to the voltage seen on the DSV pin minus “Droop”.
Deeper Sleep Voltage - DRSV
The Deeper Sleep voltage, DRSV, is programmed by an
external voltage divider network from the 1.75V reference
on the OCSET pin (Refer to Figure 8). In Deeper Sleep
mode the ISL6217 controller will regulate the output voltage
to the voltage present on the DRSV pin minus “Droop”.
The IC enters Deeper Sleep mode when DRSEN is high
and DSEN# is low, as shown in Figure 7.
Overcurrent Setting - OCSET
The ISL6217 overcurrent protection essentially compares a
user-selectable overcurrent threshold to the scaled and
sampled output current. An overcurrent condition is defined
when the sampled current is equal to or greater than the
threshold current. A step by step process to design for the
user-desired overcurrent set point is detailed next.
STEP 1: SETTING THE OVERCURRENT THRESHOLD
The overcurrent threshold is represented by the DC current
flowing out of the OCSET pin (See Figure 8). Since the
OCSET pin is held at a constant 1.75V, the user need only
populate a resistor from this pin to ground to set the
desired overcurrent threshold, I
a value of I
done, use Ohm’s Law to determine the necessary resistor
to place from OCSET to ground
For example, if the desired overcurrent threshold is 15µA,
the total resistance from OCSET must equal 117k Ω .
STEP 2: SELECTING ISEN RESISTANCE FOR DESIRED
OVERCURRENT LEVEL
After choosing the I
what level of total output current is desired for overcurrent.
Typically, this number is between 150% and 200% of the
maximum operating current of the application. For
example, if the max operating current is 46A, and the user
chooses 150% overcurrent, the ISL6217 will shut down if
the output current exceeds 46A*1.5 or 69A. According to
the Block Diagram, the equation below should be used to
determine R
In Equation 3, M represents the number of Low-Side
MOSFETs in one channel, and N represents the number of
channels. Using the examples above (I
15µA) and substituting the values M = 2, N=2, r
6mΩ, R
STEP 3: THERMAL COMPENSATION FOR R
DESIRED)
If PTCs are used for thermal compensation, then R ISEN is
found using the room temperature value of r
standard resistors are used for RISEN, then the “HOT”
value of r
MOSFET r
efficiency, and board area. However, if more precise
R
R
OCSET
ISEN
=
ISEN
DS(ON)
=
I (
DS(ON)
OCSET
I
OCSET
I
OC
is calculated to be 1.5KΩ.
OCSET
ISEN
. 1
75
should be used for this calculation.
⋅
once the overcurrent level, I
sensing provides advantages in cost,
r
between 10µA and 15µA. Once this is
V
(
DSON
+
OCSET
M
=
2
μ
R
A
1
)
)
+
level, the user must then decide
⋅
⋅
. 0
R
N
2
2175
−
+
4
OCSET
R
μ
A
3
. The user should pick
OC
= 69A, I
(EQ. 2)
(EQ. 3)
DS(ON)
OC
, is chosen.
DS(ON)
DS(ON)
. If
OCSET
=
(IF
=