ISL6217CVZ-T Intersil, ISL6217CVZ-T Datasheet
ISL6217CVZ-T
Specifications of ISL6217CVZ-T
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ISL6217CVZ-T Summary of contents
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... Pb-Free Plus Anneal Available (RoHS Compliant) Ordering Information PART NUMBER TEMP (°C) ISL6217CV - ISL6217CV TSSOP Tape and Reel ISL6217CVZ - (Note 1) ISL6217CVZ TSSOP Tape and Reel (Note 1) (Pb-free) ISL6217CVZA - (Note 1) ISL6217CVZA TSSOP Tape and Reel (Note 1) (Pb-free) NOTES: 1. Intersil Pb-free plus anneal products employ special Pb-free material sets ...
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Pinout ISL6217 (38 LEAD TSSOP) TOP VIEW VDD 1 38 DACOUT 2 37 DSV 3 36 FSET 4 35 PWRCH DRSEN 7 32 DSEN VID0 9 30 ISL6217 VID1 10 29 TSSOP VID2 ...
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Block Diagram VSEN PGOOD + CONTROL OVP - FAULT LOGIC 112% RISING 102% FALLING 88% RISING 84% FALLING - + UV 32 COUNT CLOCK CYCLE DACOUT V SOFT SOFT SOFT START EA+ VID0 VID1 VID2 VID VID3 D/A VID4 VID5 ...
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Typical Application - 2-Phase Converter Figure 1 shows a 2-Phase Synchronous Buck Converter circuit used to provide “CORE” voltage regulation for the Intel Pentium“ IV mobile processor using IMVP-IV™ and IMVP-IV+™ voltage positioning. The ISL6217 PWM controller can be configured ...
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Absolute Voltage Ratings Supply Voltage, VDD, VDDP .....................................-0.3-+7V Battery Voltage, VBAT.................................................... +30V Boot1,2 and UGATE1,2 .................................................. +35V Phase1,2 and ISEN1,2 ................................................... +30V Boot1,2 with respect to Phase1,2 .................................. +6.5V UGATE1,2 ................... (Phase1,2 - 0.3V) to (Boot1,2 + 0.3V) PHASE 1,2 ...
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Electrical Specifications Operating Conditions: VDD = 5V -10°C to 85°C, Unless Otherwise Specified PARAMETER UGATE Source Resistance 500mA Source Current UGATE Source Current V UGATE-PHASE = 2.5V UGATE Sink Resistance 500mA Sink Current UGATE Sink Current V UGATE-PHASE ...
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Functional Pin Description VDD 1 DACOUT 2 DSV 3 FSET 4 PWRCH DRSEN 7 DSEN# 8 VID0 9 ISL6217 VID1 10 TSSOP VID2 11 VID3 12 VID4 13 VID5 14 PGOOD 15 EA+ 16 COMP 17 FB ...
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... The ISL6217 PGOOD pin is both an input and an output. The system signal, IMVP4_PWRGD, is connected to power good signals from the Vccp and Vcc_mch supplies. The Intersil ISL6227, Dual Voltage Regulator is an ideal choice for the Vccp and Vcc_mch supplies. Once the output voltage is within the “Boot” level regulation ...
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ISL6217 DROOP + EA+ SOFT R DROOP + V DROOP C SOFT FIGURE 3. SOFT-START TRACKING CIRCUITRY SHOWING INTERNAL CURRENT SOURCES AND "DROOP" FOR ACTIVE, DEEP AND DEEPER SLEEP MODES OF OPERATION The “Droop” current ...
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Table 1. IMPV-IV VID CODES VID5 VID4 VID3 VID2 VID1 ...
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Current VID Code VID[0..5] < 600ns Current Voltage Level V CC_CORE PGOOD HIGH FIGURE 5. PLOT SHOWING TIMING OF VID CODE CHANGES AND CORE VOLTAGE SLEWING AS WELL AS PGOOD MASKING VID[0..5] STP_CPU# (DSEN#) VID Command Voltage V CC_CORE FIGURE ...
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When DSEN# is logic low and DRSEN is logic high the controller will operate in Deeper Sleep mode. The ISL6217 will then regulate to the voltage at the DRSV pin minus “Droop”. If the PWRCH pin is connected to the ...
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Precision Current Sense Resistor, R POWER , may be inserted between the SOURCE of each channel’s lower MOSFET and ground. The small R ISEN resistor, as described above, is then replaced with a standard ...
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... ISL6217 CORE regulator regulates to the “Boot” voltage, it waits for the PGOOD logic HIGH signals from the Vccp and Vcc_mch regulators. The Intersil ISL6227 is a perfect choice for these two supplies dual regulator and has independent PGOOD functions for each supply. Once ...
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Control Loops The “Block Diagram” and Figure 9 shows a simplified diagram of the voltage regulation and current control loops for a two-phase converter. Both voltage and current feedback are used to precisely regulate voltage and tightly control output currents, ...
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TM As per the Intel IMVP-IV and IMVP-IV+ Droop = 0.003 (Ω). Therefore, 25A of full load current equates to a 0.075V Droop output voltage from the VID setpoint (Refer to Figure 3 and Figure 9), R selected based on ...
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The worst case duty cycle is defined as the maximum operating CORE output voltage divided by the minimum operating battery voltage. Find the corresponding y-axis ...
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Typical Application - 2 Phase Converter Using ISL6217 PWM Controller - 38 Lead TSSOP Figure 14 shows the ISL6217, Synchronous Buck Converter circuit used to provide the CORE voltage regulation for the Intel IMVP-IV™ and IMVP-IV+™ application. The circuit uses ...
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