ISL6265HRTZ Intersil, ISL6265HRTZ Datasheet - Page 21

• Manufacturer Part Number: ISL6265HRTZ
• Description: IC CTLR MULTI-OUTPUT 48-TQFN
• Manufacturer: Intersil

Specifications of ISL6265HRTZ

• Applications: Controller, AMD SVI Capable Mobile
• Voltage - Input: 5 ~ 24 V
• Number Of Outputs: 3
• Voltage - Output: 0.5 ~ 1.55 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The normalized RMS current calculation is written as
Equation 22:
Where:
Figure 12 provides the same input RMS current information
for two-phase designs.
I
IN_RMS N
FIGURE 12. NORMALIZED RMS INPUT CURRENT FOR
- I
- I
- D is the duty cycle that is adjusted to take into account
- where η is converter efficiency
D
FIGURE 11. NORMALIZED RMS INPUT CURRENT FOR
to I
the efficiency of the converter which is written as:
0.60
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
MAX
PP,N
=
0
MAX
----------------- -
V
,
0.3
0.2
0.1
0
0
IN
V
is the maximum continuous I
is the ratio of inductor peak-to-peak ripple current
0
O
=
⋅
I
P-P,N
0.1
η
I
2-PHASE CONVERTER
P-P,N
D
= 1
SINGLE PHASE CONVERTER
⋅
0.2
= 0.75
(
1 D
0.2
–
0.3
)
DUTY CYCLE (V
DUTY CYCLE (V
+
⎛
⎝
I
P-P,N
----- -
12
0.4
D
0.4
21
⎞ I
⎠
⋅
= 0
I
0.5
PP N ,
P-P,N
I
P-P,N
I
= 0.25
0.6
2
P-P,N
0.6
IN/
= 0.50
IN/
LOAD
I
V
P-P,N
V
O
= 0
O
)
0.7
)
= 0.5
of the converter
I
P-P,N
0.8
0.8
= 0.75
(EQ. 23)
0.9
(EQ. 22)
1.0
1.0
ISL6265
In addition to the bulk capacitance, some low ESL ceramic
capacitance is recommended to decouple between the drain
of the high-side MOSFET and the source of the low-side
MOSFET.
MOSFET Selection and Considerations
The choice of MOSFETs depends on the current each
MOSFET will be required to conduct, the switching
frequency, the capability of the MOSFETs to dissipate heat,
and the availability and nature of heat sinking and air flow.
Typically, a MOSFET cannot tolerate even brief excursions
beyond their maximum drain to source voltage rating. The
MOSFETs used in the power stage of the converter should
have a maximum V
upper voltage tolerance of the input power source and the
voltage spike that occurs when the MOSFETs switch.
There are several power MOSFETs readily available that are
optimized for DC/DC converter applications. The preferred
high-side MOSFET emphasizes low gate charge so that the
device spends the least amount of time dissipating power in
the linear region. The preferred low-side MOSFET
emphasizes low r
conduction loss.
For the low-side (LS) MOSFET, the power loss can be
assumed to be conductive only and is written as Equation 24:
For the high-side (HS) MOSFET, the its conduction loss is
written as Equation 25:
For the high-side MOSFET, the switching loss is written as
Equation 26:
Where:
Selecting The Bootstrap Capacitor
All three integrated drivers feature an internal bootstrap
schottky diode. Simply adding an external capacitor across
the BOOT and PHASE pins completes the bootstrap circuit.
The bootstrap function is also designed to prevent the
bootstrap capacitor from overcharging due to the large
negative swing at the PHASE node. This reduces voltage
stress on the BOOT and PHASE pins.
P
P
P
CON_LS
CON_HS
SW_HS
- I
- I
- t
- t
inductor current minus 1/2 of the inductor ripple current
current plus 1/2 of the inductor ripple current
saturation
VALLEY
PEAK
ON
OFF
is the time required to drive the device into
=
is the time required to drive the device into cut-off
≈
is the sum of the DC component of the inductor
=
I
V
---------------------------------------------------------------- -
LOAD
is the difference of the DC component of the
I
IN
LOAD
•
I
VALLEY
2
DS(ON)
2
r ⋅
DS
•
DS ON
r
DS ON
2
rating that exceeds the sum of the
(
(
•
when fully saturated to minimize
t
ON
)_LS
)_HS
•
f
SW
•
(
•
1 D
D
+
–
V
------------------------------------------------------------ -
IN
)
•
I
PEAK
2
•
t
OFF
May 13, 2009
•
(EQ. 26)
(EQ. 24)
(EQ. 25)
f
SW
FN6599.1