ISL6264CRZ Intersil, ISL6264CRZ Datasheet - Page 15

• Manufacturer Part Number: ISL6264CRZ
• Description: IC CORE CTRLR TWO-PHASE 40-QFN
• Manufacturer: Intersil

Specifications of ISL6264CRZ

• Applications: Controller, AMD Mobile Turion™
• Voltage - Input: 5 ~ 24 V
• Number Of Outputs: 1
• Voltage - Output: 0.38 ~ 1.55 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 40-VFQFN, 40-VFQFPN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

VID5
TABLE 1. V
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VID4
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
ID
TABLE FOR AMD 6-BIT V
VID3
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
VID2
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
15
VID1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
ID
CPU (Continued)
VID0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0.8750
0.8500
0.8250
0.8000
0.7750
0.7625
0.7500
0.7375
0.7250
0.7125
0.7000
0.6875
0.6750
0.6625
0.6500
0.6375
0.6250
0.6125
0.6000
0.5875
0.5750
0.5625
0.5500
0.5375
0.5250
0.5125
0.5000
0.4875
0.4750
0.4625
0.4500
0.4375
0.4250
0.4125
0.4000
0.3875
0.3750
VOUT
(V)
ISL6264
A fully-differential amplifier implements core voltage sensing
for precise voltage control at the microprocessor die. The
inputs to the amplifier are the VSEN and RTN pins.
As the load current increases from zero, the output voltage will
droop from the VID table (Table 1) value by an amount
proportional to current to achieve the proper load line. The
ISL6264 provides for current to be measured using either
resistors in series with the channel inductors as shown in the
application circuit of Figure 3, or using the intrinsic series
resistance of the inductors as shown in the application circuit
of Figure 2. In both cases signals representing the inductor
currents are summed at VSUM, which is the non-inverting
input to the DROOP amplifier shown in the block diagram of
Figure 1. The voltage at the DROOP pin minus the output
voltage, VO, is a high-bandwidth analog of the total inductor
current. This voltage is used as an input to a differential
amplifier to achieve the load line, and also as the input to the
overcurrent protection circuit.
When using inductor DCR current sensing, a single NTC
element is used to compensate the positive temperature
coefficient of the copper winding thus maintaining the load-line
accuracy.
In addition to monitoring the total current (used for DROOP
and overcurrent protection), the individual channel average
currents are also monitored and used for balancing the load
between channels. The IBAL circuit will adjust the channel
pulse-widths up or down relative to the other channel to cause
the voltages presented at the ISEN pins to be equal.
The ISL6264 controller can be configured for two-channel
operation, with the channels operating 180° apart. The
channel PWM frequency is determined by the value of RFSET
connected to pin VW as shown in Figure 2 and Figure 3. Input
and output ripple frequencies will be the channel PWM
frequency multiplied by the number of active channels.
High Efficiency Operation Mode
The ISL6264 has two operating modes to optimize efficiency.
The controller's operational modes are designed to work in
conjunction with the PSI_L control signal to maintain the
optimal system configuration. These operating modes are
established as shown in Table 2. At high current levels, the
system will operate with both phases fully active, responding
rapidly to transients and deliver the maximum power to the
load. At reduced load current levels, one of the phases may
be idled. This configuration will minimize switching losses,
while still maintaining transient response capability. At the
lowest current levels, the controller automatically configures
the system to operate in single-phase automatic-DCM mode,
thus achieving the highest possible efficiency. In this mode of
operation, the lower FET will be configured to automatically
detect and prevent discharge current flowing from the output
capacitor through the inductors, and the switching frequency
will be proportionately reduced, thus greatly reducing both
conduction and switching losses.
May 28, 2009
FN6359.3