ISL6334BCRZ-T Intersil, ISL6334BCRZ-T Datasheet - Page 22

IC CTRLR PWM SYNC BUCK 40-QFN

ISL6334BCRZ-T

Manufacturer Part Number
ISL6334BCRZ-T
Description
IC CTRLR PWM SYNC BUCK 40-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6334BCRZ-T

Applications
Controller, Intel VR11.1
Voltage - Input
3 ~ 12 V
Number Of Outputs
1
Voltage - Output
0.5 ~ 1.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
40-VFQFN, 40-VFQFPN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
and lower MOSFETs. If the overvoltage condition reoccurs,
ISL6334B, ISL6334C will again command the lower MOSFETs
to turn on. ISL6334B, ISL6334C will continue to protect the load
in this fashion as long as the overvoltage condition occurs.
Once an overvoltage condition is detected, normal PWM
operation ceases until ISL6334B, ISL6334C is reset. Cycling
the voltage on EN_PWR, EN_VTT or VCC below the
POR-falling threshold will reset the controller. Cycling the
VID codes will not reset the controller.
Overcurrent Protection
ISL6334B, ISL6334C has two levels of overcurrent protection.
Each phase is protected from a sustained overcurrent
condition by limiting its peak current, while the combined
phase currents are protected on an instantaneous basis.
In instantaneous protection mode, ISL6334B, ISL6334C
utilizes the sensed average current I
overcurrent condition. See “Channel-Current Balance” on
page 15 for more details on how the average current is
measured. The average current is continually compared with
a constant 105µA reference current, as shown in Figure 10.
Once the average current exceeds the reference current, a
comparator triggers the converter to shutdown.
The current out of IMON pin is equal to the sensed average
current I
at IMON will be proportional to the sensed average current
and the resistor value. The ISL6334B, ISL6334C continuously
monitors the voltage at IMON pin. If the voltage at IMON pin is
higher than 1.11V, a comparator triggers the overcurrent
shutdown. By increasing the resistor between IMON and
GND, the overcurrent protection threshold can be adjusted to
be less than 105µA. For example, the overcurrent threshold
for the sensed average current I
using a 11.8k
At the beginning of overcurrent shutdown, the controller
places all PWM signals in a high-impedance state within
20ns, commanding the Intersil MOSFET driver ICs to turn off
FIGURE 11. OVERCURRENT BEHAVIOR IN HICCUP MODE.
0A
0V
AVG
. With a resistor from IMON to GND, the voltage
Ω
F
SW
resistor from IMON to GND.
OUTPUT CURRENT
OUTPUT VOLTAGE
= 500kHz
2ms/DIV
22
AVG
can be set to 95µA by
AVG
to detect an
ISL6334B, ISL6334C
both upper and lower MOSFETs. The system remains in this
state a period of 4096 switching cycles. If the controller is still
enabled at the end of this wait period, it will attempt a
soft-start. If the fault remains, the trip-retry cycles will
continue indefinitely (as shown in Figure 11) until either
controller is disabled or the fault is cleared. Note that the
energy delivered during trip-retry cycling is much less than
during full-load operation, so there is no thermal hazard
during this kind of operation.
For the individual channel overcurrent protection, ISL6334B,
ISL6334C continuously compares the sensed current signal
of each channel with the 129µA reference current. If one
channel current exceeds the reference current, ISL6334B,
ISL6334C will pull PWM signal of this channel to low for the
rest of the switching cycle. This PWM signal can be turned
on next cycle if the sensed channel current is less than the
129µA reference current. The peak current limit of individual
channel will not trigger the converter to shutdown.
Thermal Monitoring (VR_HOT)
VR_HOT is a thermal signal to indicate the temperature
status of the voltage regulator and valid only after the
controller is enabled. The VR_HOT pin is an open-drain
output, and an external pull-up resistor is required.
The VR_HOT signal can be used to inform the system that
the temperature of the voltage regulator is too high and the
CPU should reduce its power consumption. The VR_HOT
signal may be tied to the CPU’s PROC_HOT signal.
The diagram of thermal monitoring function block is shown in
Figure 12. One NTC resistor should be placed close to the
power stage of the voltage regulator to sense the operational
temperature, and one pull-up resistor is needed to form the
voltage divider for the TM pin. As the temperature of the
power stage increases, the resistance of the NTC will
reduce, resulting in the reduced voltage at the TM pin.
Figure 13 shows the TM voltage over the temperature for a
typical design with a recommended 6.8kΩ NTC (P/N:
NTHS0805N02N6801 from Vishay) and 1kΩ resistor RTM1.
FIGURE 12. BLOCK DIAGRAM OF THERMAL MONITORING
o
c
VCC
R
R
TM
TM1
NTC
FUNCTION
0.333V
CC
VR_HOT
August 31, 2010
FN6689.2

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