ISL6333CCRZ Intersil, ISL6333CCRZ Datasheet - Page 4

• Manufacturer Part Number: ISL6333CCRZ
• Description: IC CTRLR PWM 3PHASE BUCK 48-QFN
• Manufacturer: Intersil

Specifications of ISL6333CCRZ

• Applications: Controller, Intel VR11
• Voltage - Input: 5 ~ 12 V
• Number Of Outputs: 1
• Voltage - Output: 0.5 ~ 1.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pinouts
Controller Descriptions and Comments
ISL6333
ISL6333A
ISL6333B
ISL6333C
ISL6333
ISL6333A
ISL6333B
ISL6333C
CONTROLLER
CONTROLLER
(Continued)
When PSI# is set high, the controller operates normally in continuous conduction mode (CCM) with all active channels firing.
When the PSI# pin is set low, the controller transitions to single phase operation and changes to diode emulation mode (DEM).
The controller also utilizes it’s new Gate Voltage Optimization Technology (GVOT) to reduce Channel 1’s lower MOSFET gate
drive voltage. This controller yields the highest low load efficiency.
When PSI# is set high, the controller operates normally in continuous conduction mode (CCM) with all active channels firing.
When the PSI# pin is set low, the controller transitions to single phase operation only.
Same feature set as the ISL6333 controller with two additional changes. The CPURST_N pin is added to eliminate extensive
external circuitry required for proper PSI# operation of Intel’s Eaglelake Chipset Platform. The droop pin has been removed
and the droop current now flows out of the FB pin. The droop feature is always active. This controller yields the highest low
load efficiency.
Same feature set as the ISL6333A controller with two additional changes. The CPURST_N pin is added to eliminate extensive
external circuitry required for proper PSI# operation of Intel’s Eaglelake Chipset Platform. The droop pin has been removed
and the droop current now flows out of the FB pin. The droop feature is always active.
MODE (DEM)
EMULATION
CPURST_N
DIODE
YES
YES
NO
NO
COMP
VDIFF
RSET
VCC
DVC
OFS
REF
APA
4
SS
FB
FS
10
12
11
1
2
3
4
5
6
7
8
9
GATE VOLTAGE OPTIMIZATION
ISL6333, ISL6333A, ISL6333B, ISL6333C
ISL6333, ISL6333A, ISL6333B, ISL6333C
48
13
TECHNOLOGY
47
14
(GVOT)
46
15
YES
YES
NO
NO
45
16
ISL6333C (48 LD QFN)
44
17
GND (PIN 49)
TOP VIEW
43
18
42
19
DROOP PIN
COMMENTS
41
20
YES
YES
NO
NO
40
21
39
22
ENABLE/DISABLE DROOP
38
23
37
24
Always Enabled
Always Enabled
Enable/Disable
Enable/Disable
36
35
34
33
32
31
30
29
28
27
26
25
VR_RDY
EN
PUVCC
PHASE2
UGATE2
BOOT2
LGATE2
PVCC3
LGATE3
BOOT3
UGATE3
PHASE3
CPURST_N PIN
YES
YES
NO
NO
October 8, 2010
FN6520.3