EL5126CLZ Intersil, EL5126CLZ Datasheet

EL5126CLZ

Manufacturer Part Number

EL5126CLZ

Description

IC VOLTAGE GEN 8CH TFT-LCD 32QFN

Manufacturer

Intersil

Datasheet

1.EL5126CLZ.pdf (12 pages)

Specifications of EL5126CLZ

Applications

Converter, TFT, LCD

Voltage - Input

4.5 ~ 16.5 V

Number Of Outputs

Voltage - Output

0.5 ~ 14.95 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Current page: 1 of 12
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8-Channel TFT-LCD Reference Voltage

Generator

programmed to the required voltage with 10 bits of

resolution. Reference pins determine the high and low

voltages of the output range, which are capable of swinging

to either supply rail. Programming of each output is

performed using the serial interface.

A number of the EL5126 can be stacked for applications

requiring more than 8 outputs. The reference inputs can be

tied to the rails, enabling each part to output the full voltage

range, or alternatively, they can be connected to external

resistors to split the output range and enable finer

resolutions of the outputs.

The EL5126 has 8 outputs and is available in a 32 Ld QFN

package. It is specified for operation over the full -40°C to

+85°C temperature range.

Ordering Information

NOTE: Intersil Pb-free plus anneal products employ special Pb-free

material sets; molding compounds/die attach materials and 100%

matte tin plate termination finish, which are RoHS compliant and

compatible with both SnPb and Pb-free soldering operations. Intersil

Pb-free products are MSL classified at Pb-free peak reflow

temperatures that meet or exceed the Pb-free requirements of

IPC/JEDEC J STD-020.

EL5126CL

EL5126CLZ

(Note)

EL5126CL-T7

EL5126CLZ-T7

(Note)

EL5126CL-T13

EL5126CLZ-T13

(Note)

NUMBER

PART

5126CL

5126CLZ

5126CL

5126CLZ

5126CL

5126CLZ

MARKING PACKAGE

PART

The EL5126 is designed to produce

the reference voltages required in

TFT-LCD applications. Each output is

32 Ld QFN

(Pb-free)

32 Ld QFN

(Pb-free)

32 Ld QFN

(Pb-free)

Data Sheet

TAPE

REEL

AND

13”

7”

MDP0046

PKG. NO.

1-888-INTERSIL or 321-724-7143

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Features

• 8-channel reference outputs

• Accuracy of ±0.1%

• Supply voltage of 4.5V to 16.5V

• Digital supply 3.3V to 5V

• Low supply current of 10mA

• Rail-to-rail capability

• I

Applications

• TFT-LCD drive circuits

• Reference voltage generators

Pinout

C control interface

August 24, 2006

AGND

REFH

REFL

VSD

CAP

All other trademarks mentioned are the property of their respective owners.

Intersil (and design) is a registered trademark of Intersil Americas Inc.

(32 LD 5X6 QFN)

TOP VIEW

THERMAL

EL5126

PAD

EL5126

FN7337.2

OUTA

OUTB

OUTC

OUTD

DGND

OUTE

OUTF

OUTG

OUTH

Related parts for EL5126CLZ

EL5126CLZ Summary of contents

Page 1

... Ld QFN (Note) (Pb-free) EL5126CL-T13 5126CL 32 Ld QFN EL5126CLZ-T13 5126CLZ 32 Ld QFN (Note) (Pb-free) NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...

Page 2

Absolute Maximum Ratings (T A Supply Voltage between V and GND .+18V S Supply Voltage between V and GND . . . ...

Page 3

Pin Descriptions PIN NUMBER PIN NAME VSD 4 REFH 5 REFL 6, 21, 11, 13 GND 7 CAP 8, 12, 14, 15, 16 OUTH 18 OUTG 19 OUTF 20 OUTE ...

Page 4

Typical Performance Curves 1 =15V S REFH V =0V 1.0 REFL 0.8 0.6 0.4 0 3.2 3.4 3.5 3.8 4 4.2 V (V) SD FIGURE 3. DIGITAL SUPPLY VOLTAGE vs DIGITAL SUPPLY CURRENT V =V =15V ...

Page 5

Typical Performance Curves OUTPUT M=400µs/DIV FIGURE 9. SMALL SIGNAL RESPONSE (FALLING FROM 200mV TO 0V) FIGURE 11. POWER DISSIPATION vs AMBIENT TEMPERATURE General Description The EL5126 provides a versatile method of providing the reference voltages that are used in setting ...

Page 6

DATA VALIDITY The data on the SDA line must be stable during the high period of the clock. The high or low state of the data line can only change when the clock signal on the SCLK line is low. ...

Page 7

I C Timing Diagram 1 STANDARD MODE (STD/REG = HIGH) WRITE MODE Start Device Address W A Data Data CLK In 1 ...

Page 8

I C Timing Diagram 2 START t CONDITION DATA CLOCK START, STOP & TIMING DETAILS OF I Analog Section TRANSFER FUNCTION The transfer function is: data × ( ...

Page 9

Block Diagram DATA CLOCK IN CHANNEL OUTPUTS Each of the channel outputs has a rail-to-rail buffer. This enables all channels to have the capability to drive to within 100mV of the power rails, ...

Page 10

The maximum power dissipation actually produced by the IC is the total quiescent supply current times the total power supply voltage and plus the power in the IC due to the loads. × Σ × ...

Page 11

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

Page 12

QFN (Quad Flat No-Lead) Package Family PIN #1 3 I.D. MARK 2X 0.075 C TOP VIEW 0. (E2) 7 (D2) BOTTOM VIEW 0. SEATING PLANE 0.08 C ...

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