ISL6556BCR Intersil, ISL6556BCR Datasheet
ISL6556BCR
Specifications of ISL6556BCR
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ISL6556BCR Summary of contents
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... ISL6556BCBZA SOIC Tape and -T (Note) Reel (Pb-free) ISL6556BCR 5x5B QFN ISL6556BCRZ 5x5B QFN (Pb-free) (Note) * Add “-T” suffix for tape and reel. NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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Pinouts 32 LEAD QFN TOP VIEW VID3 1 2 VID2 3 VID1 4 VID0 5 VID12.5 6 OFS 7 TCOMP REF ISL6556B PWM4 ...
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ISL6565BCB Block Diagram VDIFF PGOOD RGND x1 VSEN OVP +200mV OFS OFFSET REF VID4 VID3 DYNAMIC VID2 VID VID1 D/A VID0 VID12.5 COMP FB TCOMP T 3 ISL6556B OVP VCC OVP R S POWER-ON LATCH RESET (POR) Q SOFT-START CLOCK ...
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ISL6565BCR Block Diagram VDIFF PGOOD RGND x1 VSEN OVP +200mV OFS OFFSET OFSOUT REF VID4 VID3 DYNAMIC VID2 VID VID1 D/A VID0 VID12.5 COMP FB TCOMP T 4 ISL6556B OVP VCC OVP R S POWER-ON LATCH RESET (POR) Q SOFT-START ...
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Typical Application of ISL6556BCB +5V FB COMP VCC TCOMP VDIFF VSEN RGND REF PGOOD OVP ISL6556BCB PWM1 VID4 ISEN1 VID3 PWM2 VID2 ISEN2 VID1 PWM3 VID0 ISEN3 VID12.5 PWM4 OFS FS ISEN4 EN GND R T VID_PGOOD (BUFFERED) 5 ISL6556B ...
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... Typical Application of ISL6556BCR +5V COMP VCC FB OFSOUT VDIFF TCOMP VSEN RGND PGOOD REF OVP ISL6556BCR VID4 ISEN1 VID3 PWM1 VID2 PWM2 ISEN2 VID1 PWM3 VID0 ISEN3 VID12.5 PWM4 OFS FS ISEN4 GND ENLL +12V VID_PGOOD 6 ISL6556B +12V VCC BOOT UGATE PVCC PHASE HIP6601B ...
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... T VCC tied to 12VDC thru 300Ω resistor VCC tied to 12VDC thru 300Ω resistor VCC Rising VCC Falling EN Rising Hysteresis Fault Reset ENLL = 5V (Note 5) (Note 5) VID = 010100 (ISL6556BCR Only) θ θ (°C/ 0°C to 105°C. J MIN TYP MAX - 14 18 ...
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Electrical Specifications Operating Conditions: VCC = 5V or ICC < 25mA (Note 4), T Unless Otherwise Specified. (Continued) PARAMETER PIN-ADJUSTABLE OFFSET Voltage at OFS pin OSCILLATOR Accuracy Adjustment Range Sawtooth Amplitude Max Duty Cycle ERROR AMPLIFIER Open-Loop Gain Open-Loop Bandwidth ...
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... The polarity of the offset is selected by connecting the resistor to GND or VCC. For no offset, the OFS pin should be left unterminated. OFSOUT (ISL6556BCR only) - OFSOUT is the output of the offset-current generating circuit. It must be connected generate a dc offset. OVP - Overvoltage protection pin. This pin pulls to VCC and is latched when an overvoltage condition is detected ...
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... The block diagrams on pages 2 and 3 provide top level views of multi- phase power conversion using the ISL65556ACB and ISL6556BCR controllers. IL1 + IL2 + IL3, 7A/DIV IL3, 7A/DIV PWM3, 5V/DIV PWM2, 5V/DIV ...
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Figures 14, 16 and 16 in the section entitled Input Capacitor Selection can be used to determine the input-capacitor RMS current based on load current, duty cycle, and the number of channels. They are provided as aids in determining the ...
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... ISL6556B The output of the error amplifier, V sawtooth waveform to generate the PWM signals. The PWM signals control the timing of the Intersil MOSFET drivers and regulate the converter output to the specified reference voltage. The internal and external circuitry that controls voltage regulation is illustrated in Figure 5. ...
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TABLE 1. VOLTAGE IDENTIFICATION (VID) CODES VID4 VID3 VID2 VID1 VID0 ...
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... These functions are shown in Figures 6 and evident in Figure 7, the OFSOUT pin must be connected to the FB pin for this current injection to function in ISL6556BCR. The current flow through R at the REF pin, which is ultimately duplicated at the output of the regulator. Once the desired output offset voltage has been determined, ...
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... This is the ratio of the α DS(ON) requires a 5kΩ TCOMP resistor. ISL6556B INTERNAL CIRCUIT EXTERNAL CIRCUIT VCC ENABLE 10.7kΩ POR COMPARATOR CIRCUIT 1.40kΩ 1.24V ENLL (ISL6556BCR ONLY) SOFT-START AND FAULT LOGIC SENSITIVE ENABLE (EN) FUNCTION +12V FN9097.4 December 28, 2004 ...
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... To enable the controller, VCC must be greater than the POR threshold; the voltage on EN must be greater than 1.24V; For ISL6556BCR, ENLL must be logic high; and VID cannot be equal to 111111 or 111110. When each of these conditions is true, the controller immediately begins the soft-start sequence ...
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... VSEN falls below 0.6V with valid VCC or 1.5V otherwise. This causes the Intersil drivers to turn on the lower MOSFETs and pull the output voltage below a level that might cause damage to the load. The PWM outputs remain low until VDIFF falls to the programmed DAC level when they enter a high-impedance state ...
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... It is assumed that the reader is familiar with many of the basic skills and techniques referenced below. In addition to this guide, Intersil provides complete reference designs that include schematics, bills of materials, and example board layouts for all common microprocessor applications. ...
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Current Sensing The ISEN pins are denoted ISEN1, ISEN2, ISEN3 and ISEN4. The resistors connected between these pins and the respective phase nodes determine the gains in the load-line regulation loop and the channel-current balance loop as well as setting ...
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ESR Case 2: 2π 2π -------------------------------------------- 0.75V ------------------------------------------------------------ - C ...
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Input Supply Voltage Selection The VCC input of the ISL6556B can be connected either directly to a +5V supply or through a current limiting resistor to a +12V supply. An integrated 5.8V shunt regulator maintains the voltage on the VCC ...
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... IN between the components is minimized while creating the PHASE plane. Place the Intersil MOSFET driver IC as close as possible to the MOSFETs they control to reduce the parasitic impedances due to trace length between critical driver input and output signals. If possible, duplicate the same placement of these components for each phase. ...
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Small Outline Plastic Packages (SOIC) N INDEX 0.25(0.010) H AREA E - SEATING PLANE - -C- α 0.10(0.004) 0.25(0.010 NOTES: 1. Symbols are defined in the ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...