ISL6529CR Intersil, ISL6529CR Datasheet - Page 16

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ISL6529CR

Manufacturer Part Number
ISL6529CR
Description
IC CTRLR PWM DUAL REG 16-QFN
Manufacturer
Intersil
Type
Step-Down (Buck)r
Datasheet

Specifications of ISL6529CR

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
2
Voltage - Output
0.5 ~ 4.5 V
Frequency - Switching
600kHz
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Output
-
Voltage - Input
-
Power - Output
-

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interval required to slew the inductor current from an initial
current value to the final current level. During this interval the
difference between the inductor current and the load current
must be supplied by the output capacitor(s). Minimizing the
response time can minimize the output capacitance
required.
The response time to a transient is different for the
application of load and the removal of load. The following
equations give the approximate response time interval for
application and removal of a transient load:
where I
response time to the application of load, and t
response time to the removal of load.
With a +3.3V input source, the worst case response time can
be either at the application or removal of load and dependent
upon the output voltage setting. Be sure to check both of
these equations at the minimum and maximum output levels
for the worst case response time.
Input Capacitor Selection
The important parameters for the bulk input capacitors are
the voltage rating and the RMS current rating. For reliable
operation, select bulk input capacitors with voltage and
current ratings above the maximum input voltage and largest
RMS current required by the circuit. The capacitor voltage
rating should be at least 1.25 times greater than the
maximum input voltage and a voltage rating of 1.5 times is a
conservative guideline. The RMS current rating requirement
for the input capacitor of a buck regulator is approximately
1/2 of the summation of the DC load current.
Use a mix of input bypass capacitors to control the voltage
overshoot across the switching MOSFETs. Use ceramic
capacitance for the high frequency decoupling and bulk
capacitors to supply the RMS current. Small ceramic
capacitors can be placed very close to the upper MOSFET
to suppress the voltage induced in the parasitic circuit
impedances. Connect them directly to ground with a via
placed very close to the ceramic capacitor footprint.
For a through-hole design, several aluminum electrolytic
capacitors may be needed. For surface mount designs,
tantalum or special polymer capacitors can be used, but
caution must be exercised with regard to the capacitor surge
current rating. These capacitors must be capable of handling
the surge-current at power-up.
t
t
RISE
FALL
=
=
TRAN
------------------------------- -
V
L
L
------------------------------ -
O
O
IN
V
×
×
OUT
I
I
is the transient load current step, t
V
TRAN
TRAN
OUT
16
FALL
RISE
is the
ISL6529, ISL6529A
(EQ. 13)
(EQ. 14)
is the
TRANSISTOR SELECTION/CONSIDERATIONS
The ISL6529, ISL6529A require three external transistors.
One N-Channel MOSFET is used as the upper switch in a
standard buck topology PWM converter. Another MOSFET
is used as the lower synchronous switch. The linear
controller drives the gate of an N-Channel MOS transistor
used as the series pass element. The chosen MOSFET
r
regulator. For all practical purposes, the MOSFET appears
as a variable resistor. All he MOSFET transistors should be
selected based upon r
and thermal management considerations.
Upper MOSFET SWITCH Selection
In high-current applications, the MOSFET power dissipation,
package selection and heatsink are the dominant design
factors. The power dissipation includes two loss
components; conduction loss and switching loss. The
conduction losses account for a large portion of the power
dissipation of the upper MOSFET. Switching losses also
contribute to the overall MOSFET power loss.
where I
the converter (defined as V
interval, and F
The lower MOSFET has only conduction losses since it
switches with zero voltage across the device. Conduction
loss is:
These equations assume linear voltage-current transitions
and are approximations. The gate-charge losses are
dissipated by the ISL6529 and do not heat the MOSFET.
However, large gate-charge increases the switching interval,
t
Ensure that the MOSFET is within its maximum junction
temperature at high ambient temperature by calculating the
temperature rise according to package thermal-resistance
specifications. A separate heatsink may be necessary
depending upon MOSFET power, package type, ambient
temperature, air flow, and load current requirements.
The gate drive to the switching transistors ranges from
slightly below 12V to ground. Because of the large voltage
swing, logic-level transistors are not necessary in this
application.
P
P
P
SW
DS(ON)
ConductionUpper
Switching
ConductionLower
, which increases the upper MOSFET switching losses.
o
determines the maximum drop out voltage of the
is the maximum load current, D is the duty cycle of
1
-- - I
2
SW
o
×
V
is the PWM switching frequency.
IN
I
I
o
o
2
2
×
×
×
DS(ON)
t
r
r
SW
DS on
DS on
(
(
×
O
F
/V
)
)
, gate supply requirements,
SW
×
IN
×
D
(
), t
1 D
SW
)
is the switching
April 12, 2005
(EQ. 15)
(EQ. 16)
(EQ. 17)
FN9070.5

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