ISL6529CR Intersil, ISL6529CR Datasheet - Page 6

• Manufacturer Part Number: ISL6529CR
• Description: IC CTRLR PWM DUAL REG 16-QFN
• Manufacturer: Intersil
• Type: Step-Down (Buck)r

Specifications of ISL6529CR

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.5 ~ 4.5 V
• Frequency - Switching: 600kHz
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Output: -
• Voltage - Input: -
• Power - Output: -

Electrical Specifications
NOTE:
Functional Pin Descriptions
LGATE (Pin 1), (Pin 16 QFN)
Lower gate drive output. Connect to gate of the low-side
MOSFET.
PGND (Pin 2), (Pin 1 QFN)
This pin is the power ground return for the lower gate driver.
COMP Low Output, Sink Current
Undervoltage Level (V
PWM CONTROLLER GATE DRIVERS
UGATE and LGATE Maximum Voltage
UGATE and LGATE Minimum Voltage
UGATE and LGATE Source Current
UGATE and LGATE Sink Current
UGATE and LGATE OUTPUT IMPEDANCE
LINEAR REGULATOR (DRIVE2)
DC Gain
Gain-Bandwidth Product
Slew Rate
FB2 Input Current
Drive2 High Output Voltage
Drive2 Low Output Voltage
Drive2 High Output Source Current
Drive2 Low Output Sink Current
Over-Voltage Level (V
Under-Voltage Level (V
REGULATOR ISOLATION
Change in Linear Regulator Output Voltage
(Note 4)
Change in PWM Regulator Output Voltage
(Note 4)
4. Measured in the evaluation board.
DRIVE2
LGATE
PARAMETER
PGND
5VCC
GND
FB2
NC
FB2
1
2
3
5
6
7
FB
4
FB2
/V
/V
REF
/V
REF
REF
)
)
6
)
Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System
Diagrams, and Typical Application Schematic (Continued)
14
13
12
11
10
9
8
FB
UGATE
12VCC
NC
NC
COMP
NC
V
V
I
SYMBOL
I
I
OUT
OUT
V
OUT
V
R
OUT
OUT
GBWP
I
I
∆Vout
∆Vout
NC = NO INTERNAL
HGATE
LGATE
GATE
GATE
DS(on)
V
V
V
I
SR
UV
OV
UV
I
High
Low
Low

High
Low
CONNECTION
ISL6529, ISL6529A
12VCC = 12V
12VCC = 12V
12VCC = 12V
12VCC = 12V
12VCC = 12V
R
R
R
V
Percent of Nominal
Percent of Nominal
Linear Output = 2.5V, 6A Load Change on PWM
PWM Output = 1.5V, 1A Load Change on Linear
FB2
L
L
L
= 10K, C
= 10K, C
= 10K, C
= 0.8V
TEST CONDITIONS
L
L
L
= 10pF
= 10pF
= 10pF
GND (Pin 3), (Pin 2 QFN)
Signal ground for the IC. All voltage levels are measured
with respect to this pin. Place via close to pin to minimize
impedance path to ground plane.
5VCC (Pin 4), (Pin 3 QFN)
Provide a well decoupled 5V bias supply for the IC to this
pin. The voltage at this pin is monitored for Power-On Reset
(POR) purposes.
DRIVE2 (Pin 5), (Pin 4 QFN)
Connect this pin to the gate terminal of an external
N-Channel MOSFET transistor. This pin provides the gate
voltage for the linear regulator pass transistor. It also
provides a means of compensating the error amplifier for
applications where the user needs to optimize the regulator
transient response.
0.85
MIN
-0.7
2.5
9.5
11
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TYP
<0.5
<0.5
51.5
10.3
51.5
-1.4
160
3.5
3.1
0.1
1.2
12
80
15
20
-1
0
1
6
MAX
150
0.5
4.3
1.0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
April 12, 2005
UNITS
FN9070.5
MHz
V/µs
mA
mA
mA
dB
nA
%
%
%
%
%
Ω
V
V
A
A
V
V