MT36VDDF25672Y-335D2 Micron Technology Inc, MT36VDDF25672Y-335D2 Datasheet - Page 16

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MT36VDDF25672Y-335D2

Manufacturer Part Number
MT36VDDF25672Y-335D2
Description
MODULE SDRAM DDR 2GB 184DIMM
Manufacturer
Micron Technology Inc

Specifications of MT36VDDF25672Y-335D2

Memory Type
DDR SDRAM
Memory Size
2GB
Speed
333MT/s
Package / Case
184-DIMM
Main Category
DRAM Module
Sub-category
DDR SDRAM
Module Type
184RDIMM
Device Core Size
72b
Organization
256Mx72
Total Density
2GByte
Chip Density
512Mb
Maximum Clock Rate
333MHz
Operating Supply Voltage (typ)
2.5V
Operating Current
3.24A
Number Of Elements
36
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
184
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 14: I
DDR SDRAM components only
Notes: 1–5, 14, 48; notes appear following parameter tables; 0°C
pdf: 09005aef80772fd2, source: 09005aef8075ebf6
DDF36C128_256x72G.fm - Rev. D 9/04 EN
PARAMETER/CONDITION
OPERATING CURRENT: One device bank; Active-Precharge;
t
once per clock cyle; Address and control inputs changing once
every two clock cycles
OPERATING CURRENT: One device bank; Active -Read
Precharge; Burst = 4;
I
clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device
banks idle; Power-down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
=
changing once per clock cycle. V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank
active; Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One
device bank; Active-Precharge;
t
clock cycle; Address and other control inputs changing once
per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One
bank active; Address and control inputs changing once per
clock cycle;
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One
device bank active; Address and control inputs changing once
per clock cycle;
changing twice per clock cycle
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE
OPERATING CURRENT: Four device bank interleaving READs (BL
= 4) with auto precharge,
Address and control inputs change only during Active READ, or
WRITE commands
NOTE:
RC =
OUT
CK =
t
CK MIN; CKE = HIGH; Address and other control inputs
a: Value calculated as one module rank in this operating condition, and all other module ranks in I
b: Value calculated reflects all module ranks in this operating condition.
= 0mA; Address and control inputs changing once per
t
t
RC (MIN);
CK (MIN); DQ, DM andDQS inputs changing twice per
t
CK =
t
CK =
DD
t
CK =
t
CK (MIN); I
Specifications and Conditions – 1GB
t
t
RC =
CK (MIN); DQ, DM, and DQS inputs
t
CK (MIN); DQ and DQS inputs changing
t
RC =
t
t
RC (MIN);
CK =
OUT
0.2V
t
t
t
RC =
IN
CK =
RC (MIN);
= 0mA
t
CK (MIN); CKE = LOW
= V
t
t
t
RAS (MAX);
REF
CK (MIN); CKE = (LOW)
CK =
t
t
for DQ, DQS, and DM
REFC =
REFC = 7.8125µs
t
CK =
t
CK (MIN);
t
t
CK (MIN);
RFC (MIN)
t
CK
16
I
I
I
I
I
I
I
DD4W
SYM
I
I
DD3N
I
DD5A
I
I
DD2P
DD2F
DD3P
DD4R
DD 0
DD1
DD5
DD6
DD7
T
A
b
b
a
a
a
b
b
b
a
Micron Technology, Inc., reserves the right to change products or specifications without notice.
b
b
a
+70°C; V
2,322
3,122
1,800
1,080
2,160
3,222
3,222
9,180
7,452
-335
144
216
144
1GB, 2GB (x72, ECC, DR)
DD
= V
184-PIN DDR RDIMM
DD
MAX
2,322
2,952
1,620
1,800
2,772
2,772
8,460
7,290
-262
144
900
216
144
Q = +2.5V ±0.2V
©2004 Micron Technology, Inc. All rights reserved.
-26A/
2,232
2,682
2,772
8,460
6,372
-265/
1,620
1,800
2,772
-202
144
900
216
144
DD
2p (CKE LOW) mode.
UNITS NOTES
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
21, 28,
21, 28,
20, 42
20, 42
20, 42
20, 44
24, 44
20, 43
44
45
44
41
20
9

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