SD020EVK National Semiconductor, SD020EVK Datasheet

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SD020EVK

Manufacturer Part Number
SD020EVK
Description
BOARD EVALUATION CLC020
Manufacturer
National Semiconductor
Datasheet

Specifications of SD020EVK

Design Resources
CLC020 Board Schematic
Main Purpose
Interface, Serializer
Utilized Ic / Part
CLC020
Lead Free Status / RoHS Status
Not applicable / Not applicable
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Not Compliant
© 2003 National Semiconductor Corporation
CLC020
SMPTE 259M Digital Video Serializer with Integrated
Cable Driver
General Description
The CLC020 SMPTE 259M Digital Video Serializer with
Integrated Cable Driver is a monolithic integrated circuit that
encodes, serializes and transmits bit-parallel digital data
conforming to SMPTE 125M and SMPTE 267M component
video and SMPTE 244M composite video standards. The
CLC020 can also serialize other 8 or 10-bit parallel data. The
CLC020 operates at data rates from below 100 Mbps to over
400 Mbps. The serial data clock frequency is internally gen-
erated and requires no external frequency setting compo-
nents, trimming or filtering
CLC020 include: parallel-to-serial data conversion, data en-
coding using the polynomial (X
sion from NRZ to NRZI, parallel data clock frequency multi-
plication and encoding with the serial data, and coaxial cable
driving. Input for sync (TRS) detection disabling and a PLL
lock detect output are provided. The CLC020 has an exclu-
sive built-in self-test (BIST) and video test pattern generator
(TPG) with 4 component video test patterns, reference
black, PLL and EQ pathologicals and modified colour bars, in
4:3 and 16:9 raster and both NTSC and PAL formats
Separate power pins for the output driver, VCO and the
digital logic improve power supply rejection, output jitter and
noise performance.
The CLC020 is the ideal complement to the CLC011B
SMPTE 259M Serial Digital Video Decoder, CLC014 Active
Cable Equalizer, CLC016 Data Retiming PLL (clock-data
separator), CLC018 8X8 Digital Crosspoint Switch and
CLC006 or CLC007 Cable Drivers, for a complete parallel-
serial-parallel, high-speed data processing and transmission
system.
The CLC020 is powered from a single 5V supply. Power
dissipation is typically 235 mW including two 75Ω back-
matched output loads. The device is packaged in a JEDEC
28-lead PLCC.
Typical Application
*
. Functions performed by the
9
+X
4
+1), data format conver-
DS100917
*
.
Features
n SMPTE 259M serial digital video standard compliant
n No external serial data rate setting or VCO filtering
n Built-in self-test (BIST) and video test pattern generator
n Supports all NTSC and PAL standard component and
n HCMOS/TTL-compatible data and control inputs and
n 75Ω ECL-compatible, differential, serial cable-driver
n Fast VCO lock time:
n Single +5V TTL or −5V ECL supply operation
n Low power: 235 mW typical
n 28-lead PLCC package
n Commercial temperature range 0˚C to +70˚C
Applications
n SMPTE 259M parallel-to-serial digital video interfaces
n Non-SMPTE video applications
n Other high data rate parallel/serial video and data
*
Patents applications made or pending.
components required
(TPG) with 16 internal patterns
composite serial video data rates
outputs
outputs
for:
systems
— Video cameras
— VTRs
— Telecines
— Video test pattern generators and digital video test
equipment
*
<
75 µs
*
www.national.com
July 2003
10091712

Related parts for SD020EVK

SD020EVK Summary of contents

Page 1

... The device is packaged in a JEDEC 28-lead PLCC. Typical Application © 2003 National Semiconductor Corporation Features n SMPTE 259M serial digital video standard compliant n No external serial data rate setting or VCO filtering components required ...

Page 2

Block Diagram Connection Diagram www.national.com 10091702 28-Pin PLCC Order Number CLC020BCQ See NS Package Number V28A 2 10091701 ...

Page 3

... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V − CMOS/TTL Input Voltage ( CMOS/TTL Output Voltage ( CMOS/TTL Input Current (single input −0. +0. Input Current, Other Inputs CMOS/TTL Output Source/Sink Current ...

Page 4

... bps Note 6: CLC020 mounted in the SD020EVK board, configured in BIST mode (NTSC color bars) with P reference. Timing jitter measured with Tektronix VM700T using jitter measurement FFT mode, frame rate, 1kHz filter bandwidth, Hanning window. Note 7: Measured from rising-edge of first P CLK Test Loads All resistors in Ohms, 1% tolerance ...

Page 5

Test Loads (Continued) Timing Diagram FIGURE 2. Test Circuit FIGURE 3. Setup and Hold Timing 5 10091704 10091705 www.national.com ...

Page 6

Device Operation The CLC020 SMPTE 259M Digital Video Serializer is used in digital video signal origination and processing equipment: cameras, video tape recorders, telecines, video test equip- ment and others. It converts parallel component or compos- ite digital video signals ...

Page 7

Device Operation (Continued) BUILT-IN SELF-TEST (BIST) The CLC020 has a built-in self-test (BIST) function. The BIST performs a comprehensive go-no-go test of the device. The test uses either a full-field color bar for NTSC or a PLL pathological for PAL ...

Page 8

Device Operation (Continued) FIGURE 6. Test Pattern Generator Control Sequence TABLE 1. BIST and Test Pattern Generator Control Functions Standard Frame NTSC 4x3 Flat-field black NTSC 4x3 PLL pathological NTSC 4x3 EQ pathological NTSC 4x3 Color bars, 75%, 8-bars (modified, ...

Page 9

Pin Descriptions Pin # Name PCLK 14 Lock Detect 15 V SSO 16 ...

Page 10

... CLC020 outputs must be removed and re-installed on the circuit board where the PECL device is mounted. This will www.national.com SD020EVK. The board may be ordered through any of Na- tional’s sales offices. Complete circuit board layouts and schematics, for the SD020EVK are available on National’s WEB site in the application information for this device ...

Page 11

... BG1 module 27MHz clock output to the level converter input. The clock amplitude converter schematic is shown in Figure 9. Adjust the input bias control to give a 50% duty cycle output as measured on the oscilloscope/probe system. Connect the level translator to the SD020EVK board, connector P1 10091709 ...

Page 12

... Application Information is ground). Configure the SD020EVK to operate in the NTSC colour bars, BIST mode. Configure the VM700T to make the jitter measurement in the jitter FFT mode at the frame rate with 1kHz filter bandwidth and Hanning window. Configure the setup as shown in Figure 9. Switch the test equipment on (from standby mode) and allow all equipment temperatures stabilize per manufacturer’ ...

Page 13

Application Information PCB LAYOUT AND POWER SYSTEM BYPASS RECOMMENDATIONS Circuit board layout and stack-up for the CLC020 should be designed to provide noise-free power to the device. Good layout practice also will separate high frequency or high level inputs and ...

Page 14

Application Information values. New layouts using the CLC020 will benefit from the greatly reduced ancilliary component count and more com- pact layout. The CLC020 does not require external VCO filtering compo- nents. The external VCO filtering components at pin 17 ...

Page 15

... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...

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