SD020EVK National Semiconductor, SD020EVK Datasheet - Page 8

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SD020EVK

Manufacturer Part Number
SD020EVK
Description
BOARD EVALUATION CLC020
Manufacturer
National Semiconductor
Datasheet

Specifications of SD020EVK

Design Resources
CLC020 Board Schematic
Main Purpose
Interface, Serializer
Utilized Ic / Part
CLC020
Lead Free Status / RoHS Status
Not applicable / Not applicable
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Not Compliant
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Device Operation
Note: D9 through D4 = 0 (binary)
Standard
NTSC
NTSC
NTSC
NTSC
NTSC
NTSC
NTSC
NTSC
PAL
PAL
PAL
PAL
PAL
PAL
PAL
PAL
Frame
16x9
16x9
16x9
16x9
16x9
16x9
16x9
16x9
4x3
4x3
4x3
4x3
4x3
4x3
4x3
4x3
Flat-field black
PLL pathological
EQ pathological
Color bars, 75%, 8-bars (modified, see text), BIST
Flat-field black
PLL pathological, BIST
EQ pathological
Color bars, 75%, 8-bars (modified, see text)
Flat-field black
PLL pathological
EQ pathological
Color bars, 75%, 8-bars (modified, see text)
Flat-field black
PLL pathological
EQ pathological
Color bars, 75%, 8-bars (modified, see text)
TABLE 1. BIST and Test Pattern Generator Control Functions
(Continued)
FIGURE 6. Test Pattern Generator Control Sequence
Pin
TABLE 2. Component Video Test Pattern Selection
17
26
3
4
5
6
TPG_EN
Test_Out
Name
D0
D1
D2
D3
Test Pattern
TPG code input LSB
TPG code input
TPG code input
TPG code input MSB
TPG Enable, active high true
BIST Pass/Fail output. Pass=High
(See text for timing requirements)
8
Function
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
10091707
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1

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