SD020EVK National Semiconductor, SD020EVK Datasheet - Page 3

• Manufacturer Part Number: SD020EVK
• Description: BOARD EVALUATION CLC020
• Manufacturer: National Semiconductor

Specifications of SD020EVK

• Design Resources: CLC020 Board Schematic
• Main Purpose: Interface, Serializer
• Utilized Ic / Part: CLC020
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Not Compliant

Symbol
V
V
I
I
V
V
V
I
Symbol
BR
F
t
t
t
t
t
t
IH
IL
DD
r
j
jit
r
LOCK
SU
, t
, t
IH
IL
OH
OL
SDO
P CLK
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
DC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Notes 2, 3).
AC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Note 3).
Supply Voltage (V
CMOS/TTL Input Voltage (V
CMOS/TTL Output Voltage (V
CMOS/TTL Input Current (single input)
Input Current, Other Inputs
CMOS/TTL Output Source/Sink Current
SDO Output Source Current
Package Thermal Resistance
Storage Temp. Range
SDO
f
f
V
V
θ
θ
JA
JC
I
I
= V
= V
28-lead PLCC
28-lead PLCC
SS
DD
Parameter
Input Voltage High Level
Input Voltage Low Level
Input Current High Level
Input Current Low Level
CMOS Output Voltage
High Level
CMOS Output Voltage
Low Level
Serial Driver Output
Voltage
Power Supply Current,
Total
Parameter
Serial data rate
Reference Clock
Input Frequency
Reference Clock Duty
Cycle
Rise time, Fall time
Serial output jitter
Serial output jitter
Rise time, Fall time
Output overshoot
Lock time
Setup time
−0.5V
+0.5V
DD
−V
SS
)
I
)
O
)
Conditions
R
10%–90%
270 Mbps,Figure 2, (Note 6)
(Notes 4, 5)
20%–80%, (Notes 4, 5)
270 Mbps, (Notes 5, 7)
Figure 3
−0.5V to (V
−0.5V to (V
L
Conditions
V
V
I
I
R
R
Figure 2
R
R
P
NTSC Colour Bar Pattern
OH
OL
= 75Ω, AC coupled, (Note 5)
IH
IL
CLK
L
REF
L
REF
= 75Ω 1%,
= 75Ω 1%,
= V
= +10 mA
−65˚C to +150˚C
= V
= −10 mA
= 27 MHz, Figure 2,
= 1.69 kΩ 1%,
= 1.69 kΩ 1%,
SS
DD
(Note 1)
DD
DD
±
85˚C/W
35˚C/W
+ 0.5V)
+ 0.5V)
±
−5 mA
+5 mA
10 mA
20 mA
1 mA
6.0V
3
Recommended Operating
Conditions
Junction Temperature
Lead Temperature (Soldering 4 Sec)
ESD Rating (HBM)
ESD Rating (MM)
Transistor Count
Supply Voltage (V
CMOS/TTL Input Voltage
P
P
D
Maximum DC Bias on SDO pins
Operating Free Air Temperature (T
Reference
D0 through D9,
P
and Sync.
Detect Enable
Lock Detect,
Test Out
SDO, SDO
CLK
CLK
CLK
N
and P
, TPG_EN
Reference
SDO, SDO
P
P
D
SDO, SDO
D
Frequency Range
Duty Cycle
CLK
CLK
N
N
, P
to P
CLK
CLK
CLK
Rise/Fall Time
DD
−V
Min
V
700
2.0
2.4
0.0
SS
SS
)
Min
100
500
1.0
10
45
3
Typ
+40
800
4.7
0.3
47
-1
Typ
220
100
800
1.5
50
75
A
1
2
)
V
SS
Max
V
V
+60
900
0.8
-20
60
+ 0.5V
DD
DD
1500
Max
400
200
3.0
40
55
0˚C to +70˚C
10 to 40MHz
1.0 to 3.0 ns
5.0V
3.0V
V
www.national.com
45 to 55%
SS
>
>
+150˚C
+260˚C
33,400
to V
2.5 kV
200 V
±
±
mV
Units
Mbps
Units
ps
ps
MHz
10%
10%
mA
µA
µA
ns
ps
µs
ns
%
%
V
V
V
V
P-P
P-P
DD
P-P