SI3216PPQ1-EVB Silicon Laboratories Inc, SI3216PPQ1-EVB Datasheet - Page 62

• Manufacturer Part Number: SI3216PPQ1-EVB
• Description: BOARD EVAL W/SI3201 INTERFACE
• Manufacturer: Silicon Laboratories Inc
• Series: ProSLIC®r

Specifications of SI3216PPQ1-EVB

• Main Purpose: Interface, Analog Front End (AFE)
• Utilized Ic / Part: Si3216
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Si3216
Register 10. Two-Wire Impedance Synthesis Control
Reset settings = 0000_1000
62
Name
Type
Bit
7:6
5:4
2:0
3
Bit
Reserved
TISS[2:0]
CLC[1:0]
Name
TISE
D7
Read returns zero.
Line Capacitance Compensation.
00 = Off
01 = 4.7 nF
10 = 10 nF
11 = Reserved
Two-Wire Impedance Synthesis Enable.
0 = Two-wire impedance synthesis disabled.
1 = Two-wire impedance synthesis enabled.
Two-Wire Impedance Synthesis Selection.
000 = 600 
001 = 900 
010 = Japan (600  + 1 µF); requires external resistor R
011 = 900  + 2.16 µF; requires external resistor R
100 = CTR21 (270  + 750  || 150 nF).
101 = Australia/New Zealand #1 (220  + 820  || 120 nF).
110 = Slovakia/Slovenia/South Africa (220  + 820  || 115 nF).
111 = China (200  + 680  || 100 nF).
D6
D5
CLC[1:0]
R/W
D4
Rev. 1.0
TISE
R/W
D3
Function
D2
ZREF
ZREF
= 18 k  and C3, C4 = 220 nF.
TISS[2:0]
R/W
D1
= 12 k  and C3, C4 = 100 nF.
D0