SI3216PPQ1-EVB Silicon Laboratories Inc, SI3216PPQ1-EVB Datasheet - Page 81

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SI3216PPQ1-EVB

Manufacturer Part Number
SI3216PPQ1-EVB
Description
BOARD EVAL W/SI3201 INTERFACE
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheets

Specifications of SI3216PPQ1-EVB

Main Purpose
Interface, Analog Front End (AFE)
Utilized Ic / Part
Si3216
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Register 52. FSK Data
Reset settings = 0000_0000
Register 63. Loop Closure Debounce Interval
Reset settings = 0101_0100
Name
Name
Type
Type
Bit
7:1
Bit
7:0
0
Bit
Bit
Reserved
LCD[7:0]
FSKDAT
Name
Name
D7
D7
D6
D6
Read returns zero.
FSK Data.
When FSKEN = 1 (direct Register 108, bit 6) and REL = 1 (direct Register 32, bit 6), this
bit serves as the buffered input for FSK generation bit stream data.
Loop Closure Debounce Interval for Automatic Ringing.
This register sets the loop closure debounce interval for the ringing silent period when
using automatic ringing cadences. The value may be set between 0 ms (0x00) and
159 ms (0x7F) in 1.25 ms steps.
D5
D5
D4
D4
LCD[7:0]
Rev. 1.0
D3
D3
Function
Function
D2
D2
D1
D1
FSKDAT
R/W
D0
D0
Si3216
81

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