EVK-DS40MB200 National Semiconductor, EVK-DS40MB200 Datasheet - Page 5

• Manufacturer Part Number: EVK-DS40MB200
• Description: BOARD EVALUATION DS40MB200
• Manufacturer: National Semiconductor

Specifications of EVK-DS40MB200

• Main Purpose: Interface, 2:1 Multiplexer
• Utilized Ic / Part: DS40MB200
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -

POWER
V
GND
GND
Pin Name
CC
Note: I = Input, O = Output, P = Power
Note: All CML Inputs or Outputs must be AC coupled.
5, 11, 17, 32,
Pin Number
2, 8, 14, 20,
29, 35, 38,
DAP
44
41
I/O
P
P
P
V
Each V
via located as close as possible to the landing pad of the V
It is recommended to have a 0.01 μF or 0.1 μF, X7R, size-0402 bypass capacitor from each V
pin to ground plane.
Ground reference. Each ground pin should be connected to the ground plane through a low
inductance path, typically with a via located as close as possible to the landing pad of the GND pin.
Die Attach Pad (DAP) is the metal contact at the bottom side, located at the center of the LLP-48
package. It should be connected to the GND plane with at least 4 via to lower the ground impedance
and improve the thermal performance of the package.
CC
= 3.3V ± 5%.
CC
pin should be connected to the V
5
Description
CC
plane through a low inductance path, typically with a
CC
pin.
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CC