ADC08D1020DEV/NOPB National Semiconductor, ADC08D1020DEV/NOPB Datasheet - Page 41

• Manufacturer Part Number: ADC08D1020DEV/NOPB
• Description: BOARD DEV FOR ADC08D1020
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of ADC08D1020DEV/NOPB

• Number Of Adc's: 2
• Number Of Bits: 8
• Sampling Rate (per Second): 1G
• Data Interface: Serial
• Inputs Per Adc: 1 Differential
• Input Range: 870 mVpp
• Power (typ) @ Conditions: 1.6W @ 1GSPS
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: ADC08D1020
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADC08D1020DEV

troduce noise into the analog path if not isolated from that
path.
Best dynamic performance is obtained when the exposed pad
at the back of the package has a good connection to ground.
This is because this path from the die to ground is a lower
impedance than offered by the package pins.
2.9 USING THE SERIAL INTERFACE
The ADC08D1020 may be operated in the non-extended con-
trol (non-Serial Interface) mode or in the extended control
mode.
3, 4, 14 and 127 in the non-extended control mode and the
extended control mode, respectively.
2.9.1 Non-Extended Control Mode Operation
Non-extended control mode operation means that the Serial
Interface is not active and all controllable functions are con-
trolled with various pin settings. Pin 41 is the primary control
of the extended control enable function. When pin 41 is logic
high, the device is in the non-extended control mode. If pin 41
is floating and pin 52 is floating or logic high, the extended
control enable function is controlled by pin 14. The device has
functions which are pin programmable when in the non-ex-
tended control mode. An example is the full-scale range is
controlled in the non-extended control mode by setting pin 14
high or low.
C08D1020 in the non-extended control mode.
Pin 3 can be either high or low in the non-extended control
mode. See
information.
Pin 4 can be high or low or can be left floating in the non-
extended control mode. In the non-extended control mode,
pin 4 high or low defines the edge at which the output data
transitions. See
information. If this pin is floating, the output clock (DCLK) is a
DDR (Double Data Rate) clock (see
and Double Data
is irrelevant since data is clocked out on both DCLK edges.
Pin 127, if it is high or low in the non-extended control mode,
sets the calibration delay. If pin 127 is floating, the calibration
delay is the same as it would be with this pin low and the
converter performs dual edge sampling (DES).
(Pin 41 Logic Low or Pin 14 Floating and Pin 52 Floating
(Pin 41 Floating and Pin 52 Floating or Logic High)
TABLE 10. Non-Extended Control Mode Operation
127
Pin
14
3
4
TABLE 11. Extended Control Mode Operation
Table 10
127
Pin
3
4
OutEdge = Neg
Reduced V
1.2 NORMAL/EXTENDED CONTROL
Reduced V
CalDly Short
Table 10
2.4.3 Output Edge Synchronization
and
Low
Rate) and the output edge synchronization
SCS (Serial Interface Chip Select)
Table 11
indicates the pin functions of the AD-
or Logic High)
OD
IN
SDATA (Serial Data)
SCLK (Serial Clock)
Function
OutEdge = Pos
describe the functions of pins
CalDly Long
Normal V
Normal V
High
1.1.5.3 Single Data Rate
OD
IN
Extended
Floating
Control
Mode
DDR
DES
for more
for more
n/a
41
2.10 COMMON APPLICATION PITFALLS
Failure to write all register locations when using extend-
ed control mode. When using the serial interface, all nine
address locations must be written at least once with the de-
fault or desired values before calibration and subsequent use
of the ADC.
Driving the inputs (analog or digital) beyond the power
supply rails. For device reliability, no input should go more
than 150 mV below the ground pins or 150 mV above the
supply pins. Exceeding these limits on even a transient basis
may not only cause faulty or erratic operation, but may impair
device reliability. It is not uncommon for high speed digital
circuits to exhibit undershoot that goes more than a volt below
ground. Controlling the impedance of high speed lines and
terminating these lines in their characteristic impedance
should control overshoot.
Care should be taken not to overdrive the inputs of the AD-
C08D1020. Such practice may lead to conversion inaccura-
cies and even to device damage.
Incorrect analog input common mode voltage in the d.c.
coupled mode. As discussed in
2.2 THE ANALOG
must remain within 50 mV of the V
variability with temperature that must also be tracked. Distor-
tion performance will be degraded if the input common mode
voltage is more than 50 mV from V
Using an inadequate amplifier to drive the analog input.
Use care when choosing a high frequency amplifier to drive
the ADC08D1020 as many high speed amplifiers will have
higher distortion than will the ADC08D1020, resulting in over-
all system performance degradation.
Driving the V
mentioned in
ence voltage is intended to be fixed by FSR pin or Full-Scale
Voltage Adjust register settings. Over driving this pin will not
change the full scale value, but can otherwise upset opera-
tion.
Driving the clock input with an excessively high level
signal. The ADC input clock level should not exceed the level
described in the Operating Ratings Table or the input offset
could change.
Inadequate input clock levels. As described in
CLOCK
poor performance. Excessive input clock levels could result
in the introduction of an input offset.
Using a clock source with excessive jitter, using an ex-
cessively long input clock signal trace, or having other
signals coupled to the input clock signal trace. This will
cause the sampling interval to vary, causing excessive output
noise and a reduction in SNR performance.
Failure to provide adequate heat removal. As described in
2.6.2 Thermal
quate heat removal to ensure device reliability. This can be
done either with adequate air flow or the use of a simple heat
sink built into the board. The backside pad should be ground-
ed for best performance.
INPUTS, insufficient input clock levels can result in
2.1 THE REFERENCE
BG
Management, it is important to provide ade-
pin to change the reference voltage. As
INPUT, the Input common mode voltage
1.1.4 The Analog Inputs
CMO
CMO
VOLTAGE, the refer-
.
output , which has a
www.national.com
2.3 THE
and