CDB44800 Cirrus Logic Inc, CDB44800 Datasheet - Page 27

• Manufacturer Part Number: CDB44800
• Description: BOARD EVAL FOR CS44800 PWM CTRL
• Manufacturer: Cirrus Logic Inc
• Series: Popguard®r

Specifications of CDB44800

• Amplifier Type: Class D
• Output Type: 8-Channel
• Voltage - Supply: 20 V ~ 50 V
• Operating Temperature: -10°C ~ 70°C
• Board Type: Fully Populated
• Utilized Ic / Part: CS44800
• Description/function: Audio DSPs
• Operating Supply Voltage: 5 V
• Product: Audio Modules
• For Use With/related Products: CS44800
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Max Output Power X Channels @ Load: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1532; CDB-44800

DS632F1
4.4
4.4.1
DAI_SDIN1
DAI_SDIN2
DAI_SDIN3
DAI_SDIN4
FsIn Clock Domain Modules
Serial Data Inputs
Digital Audio Input Port
The CS44800 interfaces to an external Digital Audio Processor via the Digital Audio Input serial port, the
DAI serial port. The DAI port has
formats. The DAI port operates in slave operation only, where DAI_LRCK, DAI_SCLK and DAI_MCLK are
always inputs. The signal DAI_LRCK must be equal to the sample rate, Fs and must be synchronously
derived from the supplied master clock, DAI_MCLK. The serial bit clock, DAI_SCLK, is used to sample
the data bits and must be synchronously derived from the master clock.
DAI_SDIN1, DAI_SDIN2, DAI_SDIN3, and DAI_SDIN4 are the serial data input pins supplying the asso-
ciated internal PWM channel modulators. The serial data interface format selection (left-justified, right-jus-
tified, I²S, one line mode, or TDM) for the DAI serial port data input pins is configured using the appropriate
bits in the register
2's complement binary form with the MSB first in all formats.
When operated in One Line Data Mode, 6 channels of PWM data are input on DAI_SDIN1 and two addi-
tional PWM channels on DAI_SDIN4. In TDM mode, all
data line.
The DAI digital audio serial ports support 6 formats with varying bit depths from 16 to 24 as shown in
ure
configuration bits in the
17,
Figure
Table 2
18,
outlines the serial port channel allocations.
“Misc. Configuration (address 04h)” on page
Normal (I²S,LJ,RJ)
One Line #1 or #2
TDM
Normal (I²S,LJ,RJ)
One Line #1 or #2
TDM
Normal (I²S,LJ,RJ)
One Line #1 or #2
TDM
Normal (I²S,LJ,RJ)
One Line #1 or #2
TDM
Figure
Table 2. DAI Serial Audio Port Channel Allocations
“Misc. Configuration (address 04h)” on page
Data mode
19,
Figure
4
stereo data inputs with support for I²S, left-justified and right-justified
20,
Figure 21
PWMOUTA1(left channel)/PWMOUTB1(right channel)
PWMOUTA1/A2/A3/B1/B2/B3
PWMOUTA1/A2/A3/A4/B1/B2/B3/B4
PWMOUTA2(left channel)/PWMOUTB2(right channel)
not used
not used
PWMOUTA3(left channel)/PWMOUTB3(right channel)
not used
not used
PWMOUTA4(left channel)/PWMOUTB4(right channel)
PWMOUTA4/B4
not used
and
Figure
8
channels are multiplexed onto the DAI_SDIN1
Channel Assignments
22. These formats are selected using the
52. The serial audio data is presented in
52.
CS44800
Fig-
27