ADP1828LC-EVALZ Analog Devices Inc, ADP1828LC-EVALZ Datasheet - Page 26

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ADP1828LC-EVALZ

Manufacturer Part Number
ADP1828LC-EVALZ
Description
BOARD EVALUATION ADP1828LC
Manufacturer
Analog Devices Inc
Datasheets

Specifications of ADP1828LC-EVALZ

Main Purpose
DC/DC, Step Down
Outputs And Type
1, Non-Isolated
Voltage - Output
1.8V
Current - Output
5A
Voltage - Input
5.5 ~ 13.2V
Regulator Topology
Buck
Frequency - Switching
600kHz
Board Type
Fully Populated
Utilized Ic / Part
ADP1828
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
ADP1828
COINCIDENT TRACKING
The most common application is coincident tracking, used
in core vs. I/O voltage sequencing and similar applications.
Coincident tracking limits the slave output voltage to be the
same as the master voltage until it reaches regulation. Connect
the slave TRK input to a resistor divider from the master voltage
that is the same as the divider used on the slave FB pin. This
forces the slave voltage to be the same as the master voltage.
For coincident tracking, use the following equation:
where:
R
Voltage Mode Buck Regulator section .
See Figure 43 for an example of a coincident tracking circuit.
C
1µF
SS
TOP
EN
SS
R
and R
AMPLIFIER
TRKT
ERROR
ADP1828
ADP1829
= R
BOT
OR
Figure 43. Example of a Coincident Tracking Circuit
FB
are the values chosen in the Compensating the
TOP
DETAIL VIEW OF
and R
Figure 44. Coincident Tracking
ADP1828
Figure 42. Voltage Tracking
V
TRKB
OUT_MASTER
COMP
0.6V
TRK
3.3V
FB
SS
R
20kΩ
1.1V
R
10kΩ
= R
TRKT
TRKB
150nF
TIME
MASTER VOLTAGE
SLAVE VOLTAGE
C
BOT
SS
ADP1828
EN
TRK
SS
FB
R
R
TRKT
TRKB
V
OUT
R
R
MASTER
VOLTAGE
TOP
BOT
1.8V
V
OUT_SLAVE
R
20kΩ
R
10kΩ
TOP
BOT
Rev. C | Page 26 of 36
As the master voltage rises, the slave voltage also rises in the
same pattern. Eventually, the slave voltage reaches its regulation
voltage, where the internal reference takes over the regulation
while the TRK input continues to increase and thus removes
itself from influencing the output voltage. To ensure that the
output voltage accuracy is not compromised by the TRK pin
being too close in voltage to the 0.6 V reference, make sure
that the final value of the master voltage is greater than the
slave regulation voltage by at least 10%, or 60 mV as seen at the
FB node (the higher, the better). A difference of 60 mV between
TRK and the 0.6 V reference produces about 3 mV of offset in
the error amplifier, or 0.5%, at room temperature, while 100 mV
between them produces only 0.6 mV or 0.1% offset. For accurate
tracking, set the final voltage at TRK to less than or equal to
0.5 V. However, this condition would trip the PGOOD signal.
RATIOMETRIC TRACKING
Ratiometric tracking limits the output voltage to a fraction of
the master voltage. For example, the termination voltage for
DDR memories (VTT) is set to half the VDDQ voltage.
For ratiometric tracking, the simplest configuration is to tie the
TRK pin of the slave channel to the FB pin of the master channel.
The advantage of this is having the fewest components, but the
accuracy suffers as the TRK pin voltage becomes equal to the
internal reference voltage and an offset is imposed on the error
amplifier of about −18 mV at room temperature.
1
4
CH1
CH3 1.00V
5.00V
Figure 45. Coincident Tracking of Figure 43
Figure 46. Ratiometric Tracking
B W
B W
CH2 1.00V
CH4 1.00V
EN FOR BOTH ADP1828
TIME
V
MASTER VOLTAGE
SLAVE VOLTAGE
TRK_SLAVE
V
OUT_MASTER
OUT_SLAVE
B W
M 100ms
A CH1
2.60V

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