ISL6269AEVAL2Z Intersil, ISL6269AEVAL2Z Datasheet

ISL6269AEVAL2Z

Manufacturer Part Number

ISL6269AEVAL2Z

Description

EVALUATION BOARD FOR ISL6269A

Manufacturer

Intersil

Series

Robust Ripple Regulator™ (R³)r

Datasheets

1.ISL6269ACRZ.pdf (14 pages)

2.ISL6269AEVAL2Z.pdf (14 pages)

Specifications of ISL6269AEVAL2Z

Main Purpose

DC/DC, Step Down

Outputs And Type

1, Non-Isolated

Voltage - Output

1.1V or 1.2V

Current - Output

Voltage - Input

5 ~ 25V

Regulator Topology

Buck

Frequency - Switching

300kHz or 600kHz

Board Type

Fully Populated

Utilized Ic / Part

ISL6269A, ISL6269B

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Power - Output

Current page: 1 of 14
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Introduction

The ISL6269AEVAL2Z evaluation board demonstrates the

performance of the ISL6269A or ISL6269B single-phase

synchronous-buck PWM controller featuring Intersil's Robust

Ripple Regulator (R

shipped with the ISL6269A controller installed. The

ISL6269B controller can be evaluated using the

ISL6269AEVAL2Z with no further circuit modifications

beyond changing the IC. An on-board dynamic-load

generator is included for evaluating the transient-load

response, that applies a 2.5ms pulse of 250mΩ across

include:

• Design Criteria

• Recommended Test Equipment

• Interface Connections

• Switch Descriptions

• Jumper Descriptions

• Test Point Descriptions

• Typical Waveforms

• Evaluation Board Documentation

Design Criteria

The design criteria listed in Table 1 was, to a large extent,

influenced by customer input. The PWM switching frequency

can be programmed to any frequency between 200kHz and

600kHz. If only one PWM frequency setting is desired, this

can be accomplished by simply not populating R

output voltage can be programmed to any voltage between

OUT

- Start-up

- Shut-down

- Diode-emulation

- Load-transient response

- Line-transient response

- Schematic

- Bill of materials

- Silk-screen plots

- Board layer plots

PWM FREQUENCY

PARAMETER

and GND every 30ms. Contents of this document

FULL-LOAD

VOUT

VIN

TABLE 1. DC/DC DESIGN CRITERIA

) technology. The ISL6269AEVAL2Z is

1.10 or 1.20

300 or 600

VALUE

5 to 25

5.0

Application Note

ISL6269AEVAL2Z User Guide For ISL6269A and

UNITS

VDC

ADC

kHz

. The

1-888-INTERSIL or 1-888-468-3774

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

0.6V and 3.3V. If only one output voltage setting is desired,

this can be accomplished by simply not populating R

The OCP setpoint resistor R

the output load, without nuisance shutdowns due to

component tolerances and temperature effects. Using

Equation 1 finds R

- r

- I

- OC

The PWM switching frequency f

300kHz by resistance R

LOWER position. Setting switch S2 in the UPPER position

will program f

resistance of R

for R

ideally 66.8 x 10

the ripple voltage on the COMP pin. The ripple voltage on

the COMP pin increases with the bandwidth of the feedback

loop compensation, effectively reducing the value of “K”. The

ISL6269AEVAL2Z evaluation board is aggressively

compensated for approximately 100kHz bandwidth, making

the value of “K” effectively 58 x 10

The output voltage is programmed for 1.10V using resistors

LOWER position. Setting switch S3 in the UPPER position

will program the output voltage for 1.20V using resistor R

for selecting R

voltage setpoint programming resistance R

calculated using Equation 3 where:

- V

- R

- V

Begin by finding the value of R

Equation 2: R

resistance R

FSET

BOTTOM

SEN

November 14, 2007

TOP

BOTTOM

DS(ON)

REF

TOP

OUT

FSET

is 5A continuous

is 1.5A

) and the parallel resistance of R

is 26µA

ISL6269B PWM Controllers

TOP

= 600mV

All other trademarks mentioned are the property of their respective owners.

= 3.01kΩ

= 1.10V or 1.20V

⎛

⎝

----------------------------------------------------------------------------

is 2.1 (210% of I

----------------- -

K f

= 3.01kΩ, therefore R

of Q4 low-side MOSFETs is 15mΩ

) and R

). The loop compensation is usually responsible

•

Intersil (and design) is a registered trademark of Intersil Americas Inc.

----------------------------------------- -

(

TOP

-------- -

) = 57.6kΩ. The “K” constant in Equation 2 is

OUT

and R

REF

-12

(30% of I

= 3.57kΩ. Find the value of parallel

for approximately 600kHz with the parallel

and R

⎞ OC

⎠

SEN

(R19), which in this case is 3.01kΩ. The

•

however, this value can be affected by

⋅

–

TOP

REF

FSET

BOTTOM

for V

•

. Using Equation 2 finds the value

)

) = 6.49kΩ where:

DS ON

SEN

5A)

OUT

(

) when switch S3 is in the

for V

-12

= 1.20V from Equation 3:

)

) when switch S2 is in the

= 19.1kΩ.

is programmed for

) is selected to protect

OUT

and R

BOTTOM

= 1.10V from

AN1273.2

(EQ. 2)

(EQ. 3)

(EQ. 1)

Related parts for ISL6269AEVAL2Z

ISL6269AEVAL2Z Summary of contents

Page 1

... The ISL6269AEVAL2Z is shipped with the ISL6269A controller installed. The ISL6269B controller can be evaluated using the ISL6269AEVAL2Z with no further circuit modifications beyond changing the IC. An on-board dynamic-load generator is included for evaluating the transient-load response, that applies a 2.5ms pulse of 250mΩ across V and GND every 30ms ...

Page 2

Recommended Equipment • (QTY 1) Adjustable 25V, 3A Power Supply • (QTY 1) Fixed 12V, 100mA Power Supply • (QTY 1) Fixed 5V, 100mA Power Supply • (QTY 1) Adjustable 5A Constant Current Electronic Load • (QTY 1) DVM • ...

Page 3

Test-point Descriptions • TP1 to TP5: Signal ground • TP6: Scope-probe socket for measuring V • TP7: Monitors the voltage at the PVCC pin • TP8: Monitors the voltage of JP1 pins 2, 4 and 6 • TP9: Monitors the ...

Page 4

Typical Waveforms VCC EN FIGURE 1. SOFT-START: 250mΩ LOAD, FCCM = HIGH EN FIGURE 3. OUTPUT CAPACITOR IN-RUSH CURRENT: 50Ω LOAD, FCCM = LOW, 1V VOUT-PREBIAS UG LG FIGURE 5. SHUTDOWN: EN PULLED LOW, NO-LOAD 4 Application Note 1273 Application ...

Page 5

Typical Waveforms (Continued) PGOOD EN VOUT FIGURE 7. SHUTDOWN: VOUT DECAY, NO-LOAD FSET LG I-CHOKE FIGURE 9. EXITING DEM: 250mΩ LOAD-STEP VOUT VLOAD VCOMP FIGURE 11. LOAD TRANSIENT: FCCM = LOW, IN DEM BEFORE 250mΩ LOAD-STEP 5 Application Note 1273 ...

Page 6

... DNP DNP 10UF C17 10UF C14 56UF C20 FIGURE 13. ISL6269AEVAL2Z REV C CIRCUIT SCHEMATIC 6 Application Note 1273 +5VIN_B +5VIN_B 10K R21 TP14 0.1UF C12 19.1K BSS138 2 3 R16 4.7UF C10 6.49K R13 BOOT FSET 14 7 PHASE PGOOD COMP 16 5 4.7UF C4 0.01UF C3 10K ...

Page 7

FIGURE 14. PCB TOP SILK SCREEN 7 Application Note 1273 AN1273.2 November 14, 2007 ...

Page 8

FIGURE 15. PCB BOTTOM SILK SCREEN (MIRRORED) 8 Application Note 1273 AN1273.2 November 14, 2007 ...

Page 9

Application Note 1273 FIGURE 16. PCB TOP LAYER ETCH AN1273.2 November 14, 2007 ...

Page 10

Application Note 1273 FIGURE 17. PCB LAYER 2 ETCH 10 AN1273.2 November 14, 2007 ...

Page 11

Application Note 1273 FIGURE 18. PCB LAYER 3 ETCH AN1273.2 November 14, 2007 ...

Page 12

Application Note 1273 FIGURE 19. PCB BOTTOM LAYER ETCH 12 AN1273.2 November 14, 2007 ...

Page 13

Bill of Materials QTY REFERENCE 5 C1, C2, C14, C17, C24 2 C12, C13 4 C15, C16, C18, C19 1 C20 2 C21, C22 C4, C10 C9, C23 ...

Page 14

... U2 Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com ...

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