HW-V5-ML525-UNI-G Xilinx Inc, HW-V5-ML525-UNI-G Datasheet - Page 15

• Manufacturer Part Number: HW-V5-ML525-UNI-G
• Description: EVAL PLATFORM ROCKET IO VIRTEX-5
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr
• Type: FPGAr

Specifications of HW-V5-ML525-UNI-G

• Contents: ML52x Platform, Power Supply, Cables and Documentation
• For Use With/related Products: Virtex™-5 LXT
• For Use With: HW-XGI-SCLK-G - MODULE SUPER CLOCKHW-AFX-SMA-SFP - CONVERSION MODULE SMA - SFPHW-AFX-SMA-SATA - CONVERSION MODULE SMA - SATAHW-AFX-SMA-RJ45 - CONVERSION MODULE SMA - RJ45HW-AFX-SMA-NQSL-G - NQSL NELCO QUAD SERIAL LOOPHW-AFX-SMA-HSSDC2 - CONVERSION MODULE SMA - HSSDC2HW-AFX-BERG-SDRAM - EXPANSION MOD SDRAM BERG-SDRAM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 3: Power Supply Module Jumpers
ML52x User Guide
UG225 (v2.1) August 4, 2010
Notes:
1. The GTP/GTX transceiver power supply names might have the prefix MGT in other Xilinx documentation. Names with and
GTP/GTX Power
MGTAVCC
AVCCPLL
AVTTTX
AVTTRX
Supply Name
without the MGT prefix are synonymous to each other.
3. FPGA Configuration
4. Program Switch (Active-Low)
5. DONE LED
6. INIT LED
R
(1)
Max Current
Rating
1.5A
1.5A
1.5A
3.0A
listed in
external supply on its corresponding supply jack.
The FPGA can only be configured in JTAG mode using one of the following options:
•
•
•
•
For detailed information, see System ACE CompactFlash Solution
Using the configuration address DIP switches, one of eight bitstreams stored in the
CompactFlash memory card can be accessed through the on-board System ACE controller.
Note:
cable is used, thus causing no disruption in the JTAG chain.
The active-Low program switch, when pressed, grounds the program pin on of the FPGA.
The DONE LED indicates the status of the DONE pin of the FPGA. The LED lights when
DONE is high, indicating the FPGA configured successfully.
The INIT LED lights during initialization.
Parallel Cable III cable
Parallel Cable IV cable
Platform Cable USB
System ACE controller
The System ACE controller is bypassed when the flying wire leads or the Parallel Cable IV
Typical Voltage
Table
1.0V
1.2V
1.2V
1.2V
LXT
3. The power supply disable jumper must be installed before supplying an
FXT
1.0V
1.0V
1.2V
1.2V
www.xilinx.com
Adj. Pot.
Voltage
R2
R4
R1
R3
Jack
J104
J108
J107
J106
Disable
Jumper
J5
J7
J4
J6
Powers all transceiver analog
circuits.
Powers all transceiver PLL and
clock network.
Termination voltage for
transceiver transmitter.
Termination voltage for
transceiver receiver.
[Ref
Description
Detailed Description
1].
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