HW-V5-ML525-UNI-G Xilinx Inc, HW-V5-ML525-UNI-G Datasheet - Page 18

• Manufacturer Part Number: HW-V5-ML525-UNI-G
• Description: EVAL PLATFORM ROCKET IO VIRTEX-5
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr
• Type: FPGAr

Specifications of HW-V5-ML525-UNI-G

• Contents: ML52x Platform, Power Supply, Cables and Documentation
• For Use With/related Products: Virtex™-5 LXT
• For Use With: HW-XGI-SCLK-G - MODULE SUPER CLOCKHW-AFX-SMA-SFP - CONVERSION MODULE SMA - SFPHW-AFX-SMA-SATA - CONVERSION MODULE SMA - SATAHW-AFX-SMA-RJ45 - CONVERSION MODULE SMA - RJ45HW-AFX-SMA-NQSL-G - NQSL NELCO QUAD SERIAL LOOPHW-AFX-SMA-HSSDC2 - CONVERSION MODULE SMA - HSSDC2HW-AFX-BERG-SDRAM - EXPANSION MOD SDRAM BERG-SDRAM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Detailed Description
18
12. Oscillator Sockets
13. Single-Ended SMA Clock Inputs
14. Differential SMA Global Clock Inputs
The ML52x platform has two oscillator sockets, each wired for standard LVCMOS-type
oscillators. These connect to the DUT clock pins as shown in
accept both half- and full-sized oscillators and are powered by 3.3V or the VCCAUX 2.5V
power supply.
Table 7: Oscillator Sockets Connections
The ML52x platform has two single-ended clock input SMA connections that allow
connection to an external function generator. These connect to the DUT clock pins as
shown in
Table 8: SMA Clock Pin Connections
The ML52x platform has two pairs of differential SMA transceivers clock inputs that allow
connection to an external function generator. These connect to the DUT clock pins as
shown in
Table 9:
Notes:
1. For ML521 and ML523, the X3 clock input is not placed on the master clock IOB site. The environment
Notes:
1. For ML521 and ML523, the J123 clock input is not placed on the master clock IOB site. The environment
Ref Des
variable XIL_PLACE_ALLOW_LOCAL_BUFG_ROUTING must be set to demote this condition to a
warning and allow the design to continue.
variable XIL_PLACE_ALLOW_LOCAL_BUFG_ROUTING must be set to demote this condition to a
warning and allow the design to continue.
X2
X3
Ref Des
Ref Des
J123
J124
J120
J125
J121
J122
Table
Table
Differential SMA clock connections
Enable/Disable
Jumper
8.
9.
J114
J117
Pin Name
CLK_DIFF_A_N
CLK_DIFF_B_N
CLK_DIFF_A_P
CLK_DIFF_B_P
CLK_A
CLK_B
Pin Name
www.xilinx.com
Power Select
Jumper
J115
J116
AB17
ML521
E17
CLK_IN_A
CLK_IN_B
Pin Name
(1)
ML521
AC12
AC13
E13
E12
AF19
ML523
Table
ML521
D18
AB19
K18
ML523
AH15
AG15
UG225 (v2.1) August 4, 2010
(1)
J16
J17
(1)
7. The oscillator sockets
ML523
AG21
J19
ML52x User Guide
(1)
ML525
ML525
AM27
AM16
AM17
M27
M17
L17
ML525
AP27
K29
R