AT90PWM3B-16SU Atmel, AT90PWM3B-16SU Datasheet - Page 213

IC MCU AVR RISC 8K FLASH 32-SOIC

AT90PWM3B-16SU

Manufacturer Part Number
AT90PWM3B-16SU
Description
IC MCU AVR RISC 8K FLASH 32-SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheets

Specifications of AT90PWM3B-16SU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
27
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-SOIC (7.5mm Width)
Processor Series
AT90PWMx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
27
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
On-chip Dac
1-chx10-bit
Controller Family/series
AVR PWM
Eeprom Memory Size
512Byte
Ram Memory Size
512Byte
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90PWM3B-16SU
Manufacturer:
Atmel
Quantity:
4 000
Part Number:
AT90PWM3B-16SU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
19.3.3
19.3.3.1
4317H–AVR–12/06
Manchester encoding
Manchester frame
Encoder Clock
Manchester Data
Binary Data
Manchester encoding (also know as Biphase Code) is a synchronous clock encoding technique
used to encode the clock and data of a synchronous bit stream. In this technique, the actual
binary data to be transmitted are not sent as a sequence of logic 1's and 0's as in level encoded
way as in standard USART (known technically as Non Return to Zero (NRZ)). Instead, the bits
are translated into a slightly different format that has a number of advantages over using straight
binary encoding (i.e. NRZ).
Manchester encoding follows the rules:
Figure 19-2. Manchester Bi-phase levels
The USART supports Manchester encoded frames with the following characteristics:
Figure 19-3. Manchester Frame example
If the original data is a Logic 1, the Manchester code is: 0 to 1 (upward transition at bit
center)
If the original data is a Logic 0, the Manchester code is: 1 to 0 (downward transition at bit
center)
One start bit Manchester encoded (logical ‘1’)
5, 6, 7, 8, 9, 13, 14,15,16,17 data bits in transmission or reception (MSB or LSB first)
The number of data bit in a frame is independently configurable in reception and
transmission mode.
One or Two stop bits (level encoded)
Start
Bit
1 0 0 1 1 1 1 0 1 0 0 1 0 1 0 1 0
Logical 0
(up to 17 data bit)
Data Bits
Logical 1
AT90PWM2/2B/3/3B
Stop
Bits
213

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