AT90PWM3B-16SU Atmel, AT90PWM3B-16SU Datasheet - Page 249

• Manufacturer Part Number: AT90PWM3B-16SU
• Description: IC MCU AVR RISC 8K FLASH 32-SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM3B-16SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-SOIC (7.5mm Width)
• Processor Series: AT90PWMx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI/USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• On-chip Dac: 1-chx10-bit
• Controller Family/series: AVR PWM
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21.8.4
21.8.4.1
4317H–AVR–12/06
ADC Result Data Registers – ADCH and ADCL
ADLAR = 0
In accordance with the Table 29, these 3 bits select the interrupt event which will generate the
trigger of the start of conversion. The start of conversion will be generated by the rising edge of
the selected interrupt flag whether the interrupt is enabled or not. In case of trig on PSCnASY
event, there is no flag. So in this case a conversion will start each time the trig event appears
and the previous conversion is completed..
Table 29. ADC Auto Trigger Source Selection
When an ADC conversion is complete, the conversion results are stored in these two result data
registers.
When the ADCL register is read, the two ADC result data registers can’t be updated until the
ADCH register has also been read.
Consequently, in 10-bit configuration, the ADCL register must be read first before the ADCH.
Nevertheless, to work easily with only 8-bit precision, there is the possibility to left adjust the
result thanks to the ADLAR bit in the ADCSRA register. Like this, it is sufficient to only read
ADCH to have the conversion result.
Bit
Read/Write
Initial Value
ADTS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
ADTS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
ADC7
R
R
7
0
0
-
ADC6
R
R
6
0
0
-
ADTS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
ADC5
R
R
5
0
0
-
ADC4
ADTS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
R
R
4
0
0
-
ADC3
3
R
R
0
0
-
Description
Free Running Mode
Analog Comparator 0
External Interrupt Request 0
Timer/Counter0 Compare Match
Timer/Counter0 Overflow
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter1 Capture Event
PSC0ASY Event
PSC1ASY Event
PSC2ASY Event
Analog comparator 1
Analog comparator 2
Reserved
Reserved
Reserved
AT90PWM2/2B/3/3B
ADC2
R
R
2
0
0
-
ADC9
ADC1
R
R
1
0
0
ADC8
ADC0
R
R
0
0
0
ADCH
ADCL
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