AT90PWM3B-16SU Atmel, AT90PWM3B-16SU Datasheet - Page 253

• Manufacturer Part Number: AT90PWM3B-16SU
• Description: IC MCU AVR RISC 8K FLASH 32-SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM3B-16SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-SOIC (7.5mm Width)
• Processor Series: AT90PWMx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI/USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• On-chip Dac: 1-chx10-bit
• Controller Family/series: AVR PWM
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21.10 Amplifier Control Registers
21.10.1
4317H–AVR–12/06
Amplifier 0 Control and Status register – AMP0CSR
The block diagram of the two amplifiers is shown on
Figure 21-17. Amplifiers block diagram
The configuration of the amplifiers are controlled via two dedicated registers AMP0CSR and
AMP1CSR. Then the start of conversion is done via the ADC control and status registers.
The conversion result is stored on ADCH and ADCL register which contain respectively the most
significant bits and the less significant bits.
Bit
Read/Write
Initial Value
• Bit 7 – AMP0EN: Amplifier 0 Enable Bit
AMP0EN AMP0IS AMP0G1 AMP0G0
AMP1EN AMP1IS AMP1G1 AMP1G0
AMP0+
AMP1+
AMP0-
AMP1-
AMP0EN
R/W
7
0
Sampling
Sampling
AMP0IS
R/W
Clock
Clock
6
0
AMP0G1
R/W
+
+
5
0
-
-
AMP0CSR
AMP1CSR
AMP0G0
R/W
4
0
00
01
10
01
00
01
10
01
-
-
Figure
3
0
-
-
AT90PWM2/2B/3/3B
ADCK/8
ASY0
ASY1
ASY2
ADCK/8
ASY0
ASY1
ASY2
21-17.
-
-
2
0
-
-
AMP0TS1AMP0TS0
AMP1TS1AMP1TS0
Toward ADC MU
Toward ADC MUX
AMP0TS1
R/W
1
0
(AMP1)
(AMP0)
AMP0TS0
R/W
0
0
AMP0CSR
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