AT90PWM3B-16SU Atmel, AT90PWM3B-16SU Datasheet - Page 263

• Manufacturer Part Number: AT90PWM3B-16SU
• Description: IC MCU AVR RISC 8K FLASH 32-SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM3B-16SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-SOIC (7.5mm Width)
• Processor Series: AT90PWMx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI/USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• On-chip Dac: 1-chx10-bit
• Controller Family/series: AVR PWM
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.1
24.2
24.2.1
24.2.2
24.3
4317H–AVR–12/06
Boot Loader Features
Application and Boot Loader Flash Sections
Read-While-Write and No Read-While-Write Flash Sections
Application Section
BLS – Boot Loader Section
the code from the program memory. The program code within the Boot Loader section has the
capability to write into the entire Flash, including the Boot Loader memory. The Boot Loader can
thus even modify itself, and it can also erase itself from the code if the feature is not needed any-
more. The size of the Boot Loader memory is configurable with fuses and the Boot Loader has
two separate sets of Boot Lock bits which can be set independently. This gives the user a
unique flexibility to select different levels of protection.
•
•
•
•
•
•
•
Note:
The Flash memory is organized in two main sections, the Application section and the Boot
Loader section (see
BOOTSZ Fuses as shown in
have different level of protection since they have different sets of Lock bits.
The Application section is the section of the Flash that is used for storing the application code.
The protection level for the Application section can be selected by the application Boot Lock bits
(Boot Lock bits 0), see
Loader code since the SPM instruction is disabled when executed from the Application section.
While the Application section is used for storing the application code, the The Boot Loader soft-
ware must be located in the BLS since the SPM instruction can initiate a programming when
executing from the BLS only. The SPM instruction can access the entire Flash, including the
BLS itself. The protection level for the Boot Loader section can be selected by the Boot Loader
Lock bits (Boot Lock bits 1), see
Whether the CPU supports Read-While-Write or if the CPU is halted during a Boot Loader soft-
ware update is dependent on which address that is being programmed. In addition to the two
sections that are configurable by the BOOTSZ Fuses as described above, the Flash is also
divided into two fixed sections, the Read-While-Write (RWW) section and the No Read-While-
Write (NRWW) section. The limit between the RWW- and NRWW sections is given in
on page 275
•
•
Note that the user software can never read any code that is located inside the RWW section dur-
ing a Boot Loader software operation. The syntax “Read-While-Write section” refers to which
Read-While-Write Self-Programming
Flexible Boot Memory Size
High Security (Separate Boot Lock Bits for a Flexible Protection)
Separate Fuse to Select Reset Vector
Optimized Page
Code Efficient Algorithm
Efficient Read-Modify-Write Support
When erasing or writing a page located inside the RWW section, the NRWW section can be
read during the operation.
When erasing or writing a page located inside the NRWW section, the CPU is halted during
the entire operation.
1. A page is a section in the Flash consisting of several bytes (see
during programming. The page organization does not affect normal operation.
and
(1)
Figure 24-2 on page
Size
Figure
Table 36 on page
Table 40 on page 275
24-2). The size of the different sections is configured by the
Table 37 on page
266. The main difference between the two sections is:
267. The Application section can never store any Boot
267.
and
AT90PWM2/2B/3/3B
Figure
24-2. These two sections can
Table 53 on page
282) used
Table 41
263