PIC18C801-I/PT Microchip Technology, PIC18C801-I/PT Datasheet - Page 110

• Manufacturer Part Number: PIC18C801-I/PT
• Description: IC PIC MCU ROMLESS 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/PT

• Core Size: 8-Bit
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 67
• Ram Memory Size: 1.5KB
• Cpu Speed: 6.25MIPS
• No. Of Timers: 4
• Program Memory Size: EXT
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801I/PT

PIC18C601/801
9.4
PORTD is an 8-bit wide, bi-directional port. The corre-
sponding data direction register is TRISD. Setting a
TRISD bit (= 1) will make the corresponding PORTD
pin an input (i.e., put the corresponding output driver in
a Hi-Impedance mode). Clearing a TRISD bit (= 0) will
make the corresponding PORTD pin an output (i.e., put
the contents of the output latch on the selected pin).
Read-modify-write operations on the LATD register
reads and writes the latched output value for PORTD.
PORTD is an 8-bit port with Schmitt Trigger input buff-
ers. Each pin is individually configurable as an input or
output.
PORTD is multiplexed with the system bus and is avail-
able only when the system bus is disabled, by setting
EBIDS bit in register MEMCON. When operating as
the system bus, PORTD is the low order byte of the
address/data bus (AD7:AD0), or as the low order
address byte (A15:A8) if the address and data buses
are de-multiplexed.
EXAMPLE 9-4:
DS39541A-page 110
CLRF
CLRF
MOVLW
MOVWF
Note:
PORTD, TRISD and LATD
Registers
PORTD
LATD
0CFh
TRISD
On a Power-on Reset, PORTD defaults to
the system bus.
INITIALIZING PORTD
; Initialize PORTD by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RD3:RD0 as inputs
; RD5:RD4 as outputs
; RD7:RD6 as inputs
Advance Information
FIGURE 9-7:
Note:
Data Bus
WR LATD
or
WR PORTD
WR TRISD
RD PORTD
I/O pins have diode protection to V
TRIS Latch
Data Latch
D
D
CK
CK
RD LATD
RD TRISD
Q
PORTD BLOCK DIAGRAM
IN I/O MODE
Q
2001 Microchip Technology Inc.
Q
EN
EN
DD
D
Schmitt
Trigger
Input
Buffer
and V
SS
.
I/O pin