PIC18C801-I/PT Microchip Technology, PIC18C801-I/PT Datasheet - Page 138
PIC18C801-I/PT
Manufacturer Part Number
PIC18C801-I/PT
Description
IC PIC MCU ROMLESS 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18C601-IL.pdf
(320 pages)
3.PIC18C601-IL.pdf
(10 pages)
4.PIC18C601-IL.pdf
(10 pages)
Specifications of PIC18C801-I/PT
Core Size
8-Bit
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Number Of I /o
37
Program Memory Type
ROMless
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
67
Ram Memory Size
1.5KB
Cpu Speed
6.25MIPS
No. Of Timers
4
Program Memory Size
EXT
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
3-Wire, I2C, SPI, USART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
47
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18C801I/PT
Available stocks
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Manufacturer
Quantity
Price
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Manufacturer:
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Quantity:
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Manufacturer:
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- PIC16F616T-ISL PDF datasheet
- PIC18C601-IL PDF datasheet #2
- PIC18C601-IL PDF datasheet #3
- PIC18C601-IL PDF datasheet #4
- Current page: 138 of 320
- Download datasheet (6Mb)
PIC18C601/801
13.1
Timer3 can operate in one of these modes:
• As a timer
• As a synchronous counter
• As an asynchronous counter
The operating mode is determined by the clock select
bit, TMR3CS (T3CON register).
FIGURE 13-1:
FIGURE 13-2:
DS39541A-page 138
Note 1: When enable bit T1OSCEN is cleared, the inverter and feedback resistor are turned off. This reduces power drain.
TMR3IF Overflow
Interrupt Flag
bit
Note 1: When enable bit T1OSCEN is cleared, the inverter and feedback resistor are turned off. This reduces power drain.
T1OSO/
T13CKI
T1OSI
Timer3 Operation
Data Bus<7:0>
Write TMR3L
Read TMR3L
T1OSO/
T13CKI
T1OSI
TMR3IF
Overflow
Interrupt
Flag bit
TIMER3 BLOCK DIAGRAM
TIMER3 BLOCK DIAGRAM CONFIGURED IN 16-BIT READ/WRITE MODE
T1OSC
8
TMR3H
TMR3H
T1OSC
TMR3H
8
To Timer1 Clock Input
Oscillator
T1OSCEN
Enable
8
TMR3
TMR3L
Oscillator
Enable
T1OSCEN
(1)
Advance Information
8
TMR3L
CLR
(1)
(3)
Clock
Internal
F
CLR
OSC
/4
TMR3ON
On/Off
Clock
F
Internal
OSC
TMR3CS
When TMR3CS = 0, Timer3 increments every instruc-
tion cycle. When TMR3CS = 1, Timer3 increments on
every rising edge of the Timer1 external clock input or
the Timer1 oscillator, if enabled.
When the Timer1 oscillator is enabled (T1OSCEN is
set), the RC1/T1OSI and RC0/T1OSO/T1CKI pins
become inputs. That is, the TRISC<1:0> value is
ignored.
Timer3 also has an internal “RESET input”. This
RESET can be generated by the CCP module
(Section 13.0).
1
0
/4
TMR3ON
T3CCPx
CCP Special Trigger
On/Off
TMR3CS
T3CKPS1:T3CKPS0
1
0
T3SYNC
T3CCPx
CCP Special Trigger
Prescaler
1, 2, 4, 8
T3CKPS1:T3CKPS0
0
1
T3SYNC
2
Prescaler
1, 2, 4, 8
0
1
2
2001 Microchip Technology Inc.
Synchronized
Clock Input
Synchronize
SLEEP Input
Synchronized
det
Clock Input
Synchronize
SLEEP Input
det
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