DSPIC30F4013-30I/PT Microchip Technology, DSPIC30F4013-30I/PT Datasheet - Page 130

• Manufacturer Part Number: DSPIC30F4013-30I/PT
• Description: IC DSPIC MCU/DSP 48K 44TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4013-30I/PT

• Program Memory Type: FLASH
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 48KB (16K x 24)
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Data Rom Size: 1024 B
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC30F006 - MODULE SKT FOR DSPIC30F 44TQFPAC164305 - MODULE SKT FOR PM3 44TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F401330IPT

TABLE 18-2:
DCICON1
DCICON2
DCICON3
DCISTAT
TSCON
RSCON
RXBUF0
RXBUF1
RXBUF2
RXBUF3
TXBUF0
TXBUF1
TXBUF2
TXBUF3
Legend:
Note
SFR Name
1:
Addr.
024C
025A
025C
025E
— = unimplemented bit, read as ‘0’
Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
0240
0242
0244
0246
0248
0250
0252
0254
0256
0258
dsPIC30F3014/4013 DCI REGISTER MAP
DCIEN
TSE15
RSE15
Bit 15
—
—
—
RSE14
TSE14
Bit 14
—
—
—
—
DCISIDL
RSE13
TSE13
Bit 13
—
—
—
RSE12
TSE12
Bit 12
—
—
—
—
DLOOP
BLEN1
SLOT3
RSE11
TSE11
Bit 11
CSCKD
BLEN0
SLOT2
RSE10
TSE10
Bit 10
(1)
Transmit Buffer 0 Data Register
Transmit Buffer 1 Data Register
Transmit Buffer 2 Data Register
Transmit Buffer 3 Data Register
Receive Buffer 0 Data Register
Receive Buffer 1 Data Register
Receive Buffer 2 Data Register
Receive Buffer 3 Data Register
CSCKE COFSD UNFM
SLOT1
TSE9
RSE9
Bit 9
—
SLOT0
RSE8
TSE8
Bit 8
RSE7
TSE7
Bit 7
COFSG<3:0>
—
CSDOM
RSE6
TSE6
Bit 6
BCG<11:0>
—
DJST
TSE5
RSE5
Bit 5
—
TSE4
RSE4 RSE3
Bit 4
—
—
—
TSE3
Bit 3
ROV
—
RFUL
RSE2
TSE2
Bit 2
—
WS<3:0>
COFSM1
TUNF
RSE1
TSE1
Bit 1
COFSM0 0000 0000 0000 0000
TMPTY
RSE0
TSE0
Bit 0
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
Reset State