DSPIC30F4013-30I/PT Microchip Technology, DSPIC30F4013-30I/PT Datasheet - Page 157

IC DSPIC MCU/DSP 48K 44TQFP

DSPIC30F4013-30I/PT

Manufacturer Part Number
DSPIC30F4013-30I/PT
Description
IC DSPIC MCU/DSP 48K 44TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F4013-30I/PT

Program Memory Type
FLASH
Package / Case
44-TQFP, 44-VQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
48KB (16K x 24)
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Data Rom Size
1024 B
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC30F006 - MODULE SKT FOR DSPIC30F 44TQFPAC164305 - MODULE SKT FOR PM3 44TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F401330IPT

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20.9
The Peripheral Module Disable (PMD) registers
provide a method to disable a peripheral module by
stopping all clock sources supplied to that module.
When a peripheral is disabled via the appropriate PMD
control bit, the peripheral is in a minimum power
consumption state. The control and status registers
associated with the peripheral are also disabled so
writes to those registers have no effect and read values
are invalid.
A peripheral module is only enabled if both the
associated bit in the PMD register is cleared and the
peripheral is supported by the specific dsPIC DSC vari-
ant. If the peripheral is present in the device, it is
enabled in the PMD register by default.
 2010 Microchip Technology Inc.
Note 1: If a PMD bit is set, the corresponding
2: In the dsPIC30F3014 device, the T4MD,
Peripheral Module Disable (PMD)
Registers
module is disabled after a delay of 1
instruction cycle. Similarly, if a PMD bit is
cleared, the corresponding module is
enabled after a delay of 1 instruction
cycle (assuming the module control reg-
isters are already configured to enable
module operation).
T5MD,
OC4MD and DCIMD are readable and
writable, and are read as “1” when set.
IC7MD,
IC8MD,
OC3MD,
20.10 In-Circuit Debugger
When MPLAB
circuit debugging functionality is enabled. This function
allows simple debugging functions when used with
MPLAB IDE. When the device has this feature enabled,
some of the resources are not available for general
use. These resources include the first 80 bytes of data
RAM and two I/O pins.
One of four pairs of debug I/O pins may be selected by
the user using configuration options in MPLAB IDE.
These pin pairs are named EMUD/EMUC, EMUD1/
EMUC1, EMUD2/EMUC2 and MUD3/EMUC3.
In each case, the selected EMUD pin is the Emulation/
Debug Data line, and the EMUC pin is the Emulation/
Debug Clock line. These pins interface to the MPLAB
ICD 2 module available from Microchip. The selected
pair of debug I/O pins is used by MPLAB ICD 2 to send
commands and receive responses, as well as to send
and receive data. To use the in-circuit debugger
function of the device, the design must implement ICSP
connections to MCLR, V
selected EMUDx/EMUCx pin pair.
This gives rise to two possibilities:
1.
2.
dsPIC30F3014/4013
If EMUD/EMUC is selected as the debug I/O pin
pair, then only a 5-pin interface is required, as
the EMUD and EMUC pin functions are multi-
plexed with the PGD and PGC pin functions in
all dsPIC30F devices.
If EMUD1/EMUC1, EMUD2/EMUC2 or EMUD3/
EMUC3 is selected as the debug I/O pin pair,
then a 7-pin interface is required, as the
EMUDx/EMUCx pin functions (x = 1, 2 or 3) are
not multiplexed with the PGD and PGC pin
functions.
®
ICD 2 is selected as a debugger, the in-
DD
, V
SS
, PGC, PGD and the
DS70138G-page 157

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