ATMEGA329P-20MU Atmel, ATMEGA329P-20MU Datasheet - Page 310
![IC MCU 32K 4X25 LCD CTRL 64-QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATMEGA329P-20MU
Manufacturer Part Number
ATMEGA329P-20MU
Description
IC MCU 32K 4X25 LCD CTRL 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA329P-20MU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, USART, USI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA329P-16MU
ATMEGA329P-16MU
ATMEGA329P-16MU
- Current page: 310 of 427
- Download datasheet (9Mb)
8021G–AVR–03/11
Table 27-15. Parallel Programming Characteristics, V
Notes:
Figure 27-7. Parallel Programming Timing, Including some General Timing Requirements
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
BVPH
PHPL
PLBX
WLBX
PLWL
BVWL
WLWH
WLRL
WLRH
WLRH_CE
XLOL
BVDV
OLDV
OHDZ
(DATA, XA0/1, BS1, BS2)
1.
2. t
commands.
t
WLRH_CE
WLRH
Parameter
BS1 Valid before PAGEL High
PAGEL Pulse Width High
BS1 Hold after PAGEL Low
BS2/1 Hold after WR Low
PAGEL Low to WR Low
BS1 Valid to WR Low
WR Pulse Width Low
WR Low to RDY/BSY Low
WR Low to RDY/BSY High
WR Low to RDY/BSY High for Chip Erase
XTAL1 Low to OE Low
BS1 Valid to DATA valid
OE Low to DATA Valid
OE High to DATA Tri-stated
Data & Contol
RDY/BSY
is valid for the Write Flash, Write EEPROM, Write Fuse bits and Write Lock bits
PAGEL
XTAL1
is valid for the Chip Erase command.
WR
t
t
BVPH
DVXH
(1)
t
t
XHXL
PHPL
t
t
t
t
XLDX
XLWL
PLBX
PLWL
(2)
t
BVWL
CC
ATmega329P/3290P
= 5V ± 10% (Continued)
t
WLWH
WLRL
Min
150
150
3.7
7.5
67
67
67
67
67
0
0
0
t
WLBX
Typ
Max
250
250
250
4.5
1
9
t
WLRH
Units
ms
ms
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
ns
ns
310
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