PIC32MX460F512L-80I/PT Microchip Technology, PIC32MX460F512L-80I/PT Datasheet - Page 22

• Manufacturer Part Number: PIC32MX460F512L-80I/PT
• Description: IC PIC MCU FLASH 512K 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX460F512L-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 85
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164333 - MODULE SKT FOR PM3 100QFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC32MX
12.0
To program a block of data to the PIC32MX device, it
must first be loaded into SRAM.
12.1
To program a block of memory without the use of the
PE, the block of data must first be written to RAM. This
method requires the programmer to transfer the actual
machine instructions with embedded data for writing
the block of data to the devices internal RAM memory.
FIGURE 12-1:
The following steps are required to download a block of
data:
1.
2.
DS61145G-page 22
XferInstruction
Repeat Step 1 until the last instruction is
transferred to CPU.
No
DOWNLOADING A DATA
BLOCK
Without the PE
bufAddr = RAM Buffer Address
Write 32-bit Data to bufAddr
Increment bufAddr
(opcode).
DOWNLOADING DATA
WITHOUT THE PE
Done
TABLE 12-1:
12.2
When using the PE, the code memory is programmed
with the PROGRAM command (see Table 16-3). The
program can program up to one row of code memory
starting from the memory address specified in the
command. The number of PROGRAM commands
required to program a device depends on the number
of write blocks that must be programmed in the device.
FIGURE 12-2:
The following steps are required to download a block of
data using the PE:
1.
2.
3.
Opcode
Step 1: Initialize SRAM Base Address to
3c10a000
Step 2: Write the entire row of data to be
3c08<DATA>
3508<DATA>
ae08<OFFSET>
Step3:
XferFastData (PROGRAM|DATA_SIZE).
XferFastData (ADDRESS).
response = XferFastData (32’h0x00).
With the PE
0xA000_0000
programmed into system SRAM.
Repeat Step 2 until one row of data has
been loaded.
Issue Download Data Command
Receive Response
DOWNLOAD DATA OPCODES
Instruction
lui
lui
ori
sw
DOWNLOADING DATA
WITH THE PE
// OFFSET increments by 4
© 2010 Microchip Technology Inc.
$s0, 0xA000;
$t0, <DATA(31:16)>;
$t0, <DATA(15:0)>;
$t0, <OFFSET>($s0);