PIC32MX460F512L-80I/PT Microchip Technology, PIC32MX460F512L-80I/PT Datasheet - Page 41

• Manufacturer Part Number: PIC32MX460F512L-80I/PT
• Description: IC PIC MCU FLASH 512K 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX460F512L-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 85
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164333 - MODULE SKT FOR PM3 100QFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.0
PIC32MX3XX/4XX microcontrollers provide 4 GB of
unified virtual memory address space. All memory
regions including program, data memory, SFRs and
Configuration registers reside in this address space at
their respective unique addresses. The program and
data memories can be optionally partitioned into user
and kernel memories. In addition, the data memory can
be made executable, allowing PIC32MX3XX/4XX to
execute from data memory.
© 2010 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
MEMORY ORGANIZATION
of the PIC32MX3XX/4XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 3. “Memory
Organization”
“PIC32MX Family Reference Manual”,
which is available from the Microchip web
site (www.microchip.com/PIC32).
(DS61115)
of
the
4.1
• 32-bit native data width
• Separate User and Kernel mode address space
• Flexible program Flash memory partitioning
• Flexible data RAM partitioning for data and
• Separate boot Flash memory for protected code
• Robust bus exception handling to intercept
• Simple memory mapping with Fixed Mapping
• Cacheable and non-cacheable address regions
4.2
PIC32MX3XX/4XX microcontrollers implement two
address spaces: Virtual and Physical. All hardware
resources such as program memory, data memory and
peripherals are located at their respective physical
addresses. Virtual addresses are exclusively used by
the CPU to fetch and execute instructions as well as
access peripherals. Physical addresses are used by
peripherals such as DMA and Flash controller that
access memory independently of CPU.
program space
runaway code
Translation (FMT) unit
PIC32MX3XX/4XX
Key Features
PIC32MX3XX/4XX Memory Layout
DS61143G-page 41