LPC2106FBD48/01,15 NXP Semiconductors, LPC2106FBD48/01,15 Datasheet - Page 19

IC ARM7 MCU FLASH 128K 48-LQFP

LPC2106FBD48/01,15

Manufacturer Part Number
LPC2106FBD48/01,15
Description
IC ARM7 MCU FLASH 128K 48-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2100r
Datasheet

Specifications of LPC2106FBD48/01,15

Program Memory Type
FLASH
Program Memory Size
128KB (128K x 8)
Package / Case
48-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
60MHz
Connectivity
I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC21
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
64 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, KSK-LPC2106-PL, DB-LQFP48-LPC2106
Minimum Operating Temperature
- 40 C
Cpu Family
LPC2000
Device Core
ARM7TDMI-S
Device Core Size
16/32Bit
Frequency (max)
60MHz
Total Internal Ram Size
64KB
# I/os (max)
32
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4310 - EVAL BOARD LPC2158 W/LCD568-4297 - BOARD EVAL LPC21XX MCB2100622-1019 - BOARD FOR LPC2106 48-LQFP622-1008 - BOARD FOR LPC9103 10-HVSON622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K568-1756 - BOARD EVAL FOR LPC210X ARM MCU
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4367
935286617151
LPC2106FBD48/01-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2106FBD48/01,15
Manufacturer:
NXP
Quantity:
250
Part Number:
LPC2106FBD48/01,15
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
LPC2104_2105_2106_7
Product data sheet
6.14.1 Features
6.14.2 Features available in LPC2104/2105/2106/01 only
6.15.1 Features
6.15 Watchdog timer
The LPC2104/2105/2106/01 can count external events on one of the capture inputs if the
external pulse lasts at least one half of the period of the PCLK. In this configuration,
unused capture lines can be selected as regular timer capture inputs or used as external
interrupts.
The purpose of the Watchdog is to reset the microcontroller within a reasonable amount of
time if it enters an erroneous state. When enabled, the Watchdog will generate a system
reset if the user program fails to ‘feed’ (or reload) the Watchdog within a predetermined
amount of time.
A 32-bit Timer/Counter with a programmable 32-bit Prescaler.
Up to four (Timer 1) and three (Timer 0) 32-bit capture channels, that can take a
snapshot of the timer value when an input signal transitions. A capture event may also
optionally generate an interrupt.
Four 32-bit match registers that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Up to four (Timer 1) and three (Timer 0) external outputs corresponding to match
registers, with the following capabilities:
– Set LOW on match.
– Set HIGH on match.
– Toggle on match.
– Do nothing on match.
Timer can count cycles of either the peripheral clock (PCLK) or an externally supplied
clock.
When counting cycles of an externally supplied clock, only one of the timer’s capture
inputs can be selected as the timer’s clock. The rate of such a clock is limited to
PCLK
than
Internally resets chip if not periodically reloaded.
Debug mode.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
Incorrect/Incomplete feed sequence causes reset/interrupt if enabled.
Flag to indicate watchdog reset.
4
1
. Duration of HIGH/LOW levels on the selected CAP input cannot be shorter
(2PCLK)
.
Rev. 07 — 20 June 2008
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
© NXP B.V. 2008. All rights reserved.
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