EZ80F93AZ020SG Zilog, EZ80F93AZ020SG Datasheet - Page 199
![IC ACCLAIM MCU 64KB 100LQFP](/photos/6/76/67664/269-100-lqfp_sml.jpg)
EZ80F93AZ020SG
Manufacturer Part Number
EZ80F93AZ020SG
Description
IC ACCLAIM MCU 64KB 100LQFP
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Specifications of EZ80F93AZ020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Processor Series
EZ80F93x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F920200ZCOG
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
269-3874
EZ80F93AZ020SG
EZ80F93AZ020SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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PS015313-0508
RAM Control Registers
RAM Control Register
The internal data RAM can be disabled by clearing the RAM_EN bit. The default, upon
RESET, is for RAM to be enabled.
Table 111. RAM Control Register; (RAM_CTL = 00B4h)
RAM Address Upper Byte Register
The RAM_ADDR_U register defines the upper byte of the address for the on-chip RAM.
If enabled, RAM addresses assume priority over all Chip Selects. The external Chip Select
signals are not asserted if the corresponding RAM address is enabled.
Table 112. RAM Address Upper Byte Register; (RAM_ADDR_U = 00B5h)
Bit
Reset
CPU Access
Note: R/W = Read/Write; R = Read Only.
Bit
Position
7
RAM_EN
[6:0]
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
[7:0]
RAM_ADDR_U
Value
0
1
0000000 Reserved
Value Description
00h–
FFh
R/W
R/W
This byte defines the upper byte of the RAM address. On-chip
RAM is prioritized over all Memory Chip Selects. If the enabled
RAM and Chip Select addresses overlap, the external Chip
Select is not asserted.
7
1
7
1
Description
On-chip general-purpose RAM is disabled
On-chip general-purpose RAM is enabled
R/W
R
6
0
6
1
R/W
R
5
0
5
1
R/W
R
4
0
4
1
R/W
R
3
0
3
1
Product Specification
Random Access Memory
R/W
R
2
0
2
1
eZ80F92/eZ80F93
R/W
R
1
0
1
1
R/W
R
0
0
0
1
192
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