EZ80F93AZ020SG Zilog, EZ80F93AZ020SG Datasheet - Page 29
![IC ACCLAIM MCU 64KB 100LQFP](/photos/6/76/67664/269-100-lqfp_sml.jpg)
EZ80F93AZ020SG
Manufacturer Part Number
EZ80F93AZ020SG
Description
IC ACCLAIM MCU 64KB 100LQFP
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Specifications of EZ80F93AZ020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Processor Series
EZ80F93x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F920200ZCOG
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
269-3874
EZ80F93AZ020SG
EZ80F93AZ020SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Table 2. Pin Characteristics of the eZ80F92 Device (Continued)
PS015313-0508
Pin
No
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
Symbol
V
IORQ
MREQ
RD
WR
INSTRD
WAIT
RESET
NMI
BUSREQ
BUSACK
HALT_SLP
V
V
RTC_X
RTC_X
RTC_V
V
TMS
TCK
TRIGOUT
TDI
TDO
V
PD0
PD1
PD2
SS
DD
SS
SS
DD
IN
OUT
DD
Direction
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
Direction
Reset
O
O
O
O
O
O
O
U
O
U
I
I
I
I
I
I
I
I
I
I
I
Falling (Out)
Low/High
Rising (In)
Active
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Tristate
Output
Yes
Yes
Yes
Yes
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Yes
Yes
Yes
Yes
Yes
No
No
No
No
Up/Down
Pull
No
No
No
No
No
No
No
No
No
No
No
No
No
Up
No
No
No
No
No
No
Up
Product Specification
Schmitt
Trigger
Input
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
Architectural Overview
Open Drain/
OD & OS
OD & OS
OD & OS
Source
N/A
N/A
N/A
N/A
N/A
N/A
N/A
No
No
No
No
No
No
No
No
No
No
No
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