MC68HC908JB8JPE Freescale Semiconductor, MC68HC908JB8JPE Datasheet - Page 135

• Manufacturer Part Number: MC68HC908JB8JPE
• Description: IC MCU FLASH 8BIT 8K 20-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908JB8JPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: USB
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Controller Family/series: HC08
• No. Of I/o's: 13
• Ram Memory Size: 256Byte
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: USB
• Rohs Compliant: Yes
• Processor Series: HC08JB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: USB
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

9.7.2.3 Receiver Data Jitter
9.7.2.4 Data Source Jitter
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
The receiver features an input sensitivity of 200mV when both
differential data inputs are in the differential common mode range of
0.8V to 2.5V as shown in
receiver, there is a single-ended receiver (schmitt trigger) for each of the
two data lines.
The data receivers for all types of devices must be able to properly
decode the differential data in the presence of jitter. The more of the bit
time that any data edge can occupy and still be decoded, the more
reliable the data transfer will be. Data receivers are required to decode
differential data transitions that occur in a window plus and minus a
nominal quarter bit time from the nominal (centered) data edge position.
Jitter will be caused by the delay mismatches and by mismatches in the
source and destination data rates (frequencies). The receive data jitter
budget for low speed is given in
The specification includes the consecutive (next) and paired transition
values for each source of jitter.
The source of data can have some variation (jitter) in the timing of edges
of the data transmitted. The time between any set of data transitions is
N × T
transitions and T
The data jitter is measured with the same capacitive load used for
maximum rise and fall times and is measured at the crossover points of
the data lines as shown in
–1.0
Period
0.0
Universal Serial Bus Module (USB)
Figure 9-12. Differential Input Sensitivity Range
0.2
±
jitter time, where N is the number of bits between the
0.4
Period
0.6
0.8
is defined as the actual period of the data rate.
1.0
Figure
Figure
INPUT VOLTAGE RANGE (VOLTS)
Differential Input voltage Range
1.2
Differential Output
1.4
Section 18. Electrical
Voltage Range
9-12. In addition to the differential
Crossover
9-13.
1.6
1.8
2.0
Universal Serial Bus Module (USB)
2.2
2.4
2.6
Hardware Description
Specifications.
2.8
3.0
Technical Data
3.2
5.5
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