MC68HC908JB8JPE Freescale Semiconductor, MC68HC908JB8JPE Datasheet - Page 63

• Manufacturer Part Number: MC68HC908JB8JPE
• Description: IC MCU FLASH 8BIT 8K 20-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908JB8JPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: USB
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Controller Family/series: HC08
• No. Of I/o's: 13
• Ram Memory Size: 256Byte
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: USB
• Rohs Compliant: Yes
• Processor Series: HC08JB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: USB
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

4.9.3 PROGRAM Routine
4.9.4 VERIFY Routine
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
The PROGRAM routine programs a range of addresses in FLASH
memory, which does not have to be on page boundaries, either at the
begin or end address.
The VERIFY routine reads and verifies a range of FLASH memory.
Routine
Calling Address
Stack Use
Input
Routine
Calling Address
Stack Use
Input
Output
FLASH Memory
Table 4-4. PROGRAM Routine
PROGRAM
$FC09
7 Bytes
CPUSPD — CPU speed
HX —
LADDR —
DATABUF — Contains the data to be programmed
VERIFY
$FC03
6 Bytes
HX —
LADDR —
DATABUF — Contains the data to be verified
C Bit —
DATABUF — Contains the data in the range of the
Table 4-5. VERIFY Routine
FLASH start address to be programmed
FLASH end address to be programmed
FLASH start address to be verified
FLASH end address to be verified
C bit is set if verify passes
FLASH memory
ROM-Resident Routines
FLASH Memory
Technical Data
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