C8051F326-GM Silicon Laboratories Inc, C8051F326-GM Datasheet - Page 70

• Manufacturer Part Number: C8051F326-GM
• Description: IC 8051 MCU FLASH 16K 28QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F32xr

Specifications of C8051F326-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: UART/USART, USB
• Peripherals: POR
• Number Of I /o: 15
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: UART/USB
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F320DK
• Minimum Operating Temperature: - 40 C
• No. Of I/o's: 15
• Ram Memory Size: 1280Byte
• Cpu Speed: 25MHz
• No. Of Timers: 2
• Digital Ic Case Style: QFN
• Supply Voltage: RoHS Compliant
• Package: 28QFN EP
• Device Core: 8051
• Family Name: C8051F326
• Maximum Speed: 25 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1450 - ADAPTER PROGRAM TOOLSTICK F326336-1306 - KIT DEV FOR C8051F326/7
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1296-5

C8051F326/7
9.2.
The upper 256 bytes of XRAM functions as USB FIFO space. Figure 9.2 shows an expanded view of the
FIFO space and user XRAM. FIFO space is accessed via USB FIFO registers; see Section “12.5. FIFO
Management” on page 95 for more information on accessing these FIFOs. The FIFO block operates on the
USB clock domain; thus the USB clock must be active when accessing FIFO space.
Important Note: The USB clock must be active when accessing FIFO space.
70
Bits7–3: Unused. Read = 000000b. Write = don’t care.
Bits2–0: PGSEL[1:0]: XRAM Page Select Bits.
User XRAM Space
(System Clock Domain)
R/W
Bit7
-
Accessing USB FIFO Space
The XRAM Page Select Bits provide the high byte of the 16-bit external data memory
address when using an 8-bit MOVX command, effectively selecting a 256-byte page of
RAM. The upper 6-bits are "don't cares", so the 1k address block is repeated modulo over
the entire 64k external data memory address space.
SFR Definition 9.1. EMI0CN: External Memory Interface Control
R/W
Bit6
-
Figure 9.2. XRAM Memory Map Expanded View
0x03FF
0x0000
R/W
Bit5
-
(1024 bytes)
User XRAM
R/W
Bit4
-
Rev. 1.1
R/W
Bit3
-
0xFF
0xC0
0xBF
0x00
R/W
Bit2
-
OUT (128 bytes)
IN (64 bytes)
Endpoint0
Endpoint1
(64 bytes)
PGSEL1
R/W
Bit1
PGSEL0 00000000
USB FIFO Space
R/W
Bit0
(USB Clock Domain)
SFR Address:
Reset Value
0xAA